memory.c 37 KB

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  1. // This is part of Pico Library
  2. // (c) Copyright 2004 Dave, All rights reserved.
  3. // (c) Copyright 2006-2009 notaz, All rights reserved.
  4. // Free for non-commercial use.
  5. // For commercial use, separate licencing terms must be obtained.
  6. #include "pico_int.h"
  7. #include "memory.h"
  8. #include "sound/ym2612.h"
  9. #include "sound/sn76496.h"
  10. extern unsigned int lastSSRamWrite; // used by serial eeprom code
  11. unsigned long m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  12. unsigned long m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  13. unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  14. unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  15. static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr,
  16. void *func_or_mh, int is_func)
  17. {
  18. unsigned long addr = (unsigned long)func_or_mh;
  19. int mask = (1 << shift) - 1;
  20. int i;
  21. if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
  22. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
  23. start_addr, end_addr);
  24. return;
  25. }
  26. if (addr & 1) {
  27. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
  28. return;
  29. }
  30. if (!is_func)
  31. addr -= start_addr;
  32. for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
  33. map[i] = addr >> 1;
  34. if (is_func)
  35. map[i] |= 1 << (sizeof(addr) * 8 - 1);
  36. }
  37. }
  38. void z80_map_set(unsigned long *map, int start_addr, int end_addr,
  39. void *func_or_mh, int is_func)
  40. {
  41. xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  42. }
  43. void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr,
  44. void *func_or_mh, int is_func)
  45. {
  46. xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  47. }
  48. // more specialized/optimized function (does same as above)
  49. void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)
  50. {
  51. unsigned long *r8map, *r16map, *w8map, *w16map;
  52. unsigned long addr = (unsigned long)ptr;
  53. int shift = M68K_MEM_SHIFT;
  54. int i;
  55. if (!is_sub) {
  56. r8map = m68k_read8_map;
  57. r16map = m68k_read16_map;
  58. w8map = m68k_write8_map;
  59. w16map = m68k_write16_map;
  60. } else {
  61. r8map = s68k_read8_map;
  62. r16map = s68k_read16_map;
  63. w8map = s68k_write8_map;
  64. w16map = s68k_write16_map;
  65. }
  66. addr -= start_addr;
  67. addr >>= 1;
  68. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  69. r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
  70. }
  71. static u32 m68k_unmapped_read8(u32 a)
  72. {
  73. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  74. return 0; // assume pulldown, as if MegaCD2 was attached
  75. }
  76. static u32 m68k_unmapped_read16(u32 a)
  77. {
  78. elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  79. return 0;
  80. }
  81. static void m68k_unmapped_write8(u32 a, u32 d)
  82. {
  83. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  84. }
  85. static void m68k_unmapped_write16(u32 a, u32 d)
  86. {
  87. elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  88. }
  89. void m68k_map_unmap(int start_addr, int end_addr)
  90. {
  91. unsigned long addr;
  92. int shift = M68K_MEM_SHIFT;
  93. int i;
  94. addr = (unsigned long)m68k_unmapped_read8;
  95. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  96. m68k_read8_map[i] = (addr >> 1) | (1 << 31);
  97. addr = (unsigned long)m68k_unmapped_read16;
  98. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  99. m68k_read16_map[i] = (addr >> 1) | (1 << 31);
  100. addr = (unsigned long)m68k_unmapped_write8;
  101. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  102. m68k_write8_map[i] = (addr >> 1) | (1 << 31);
  103. addr = (unsigned long)m68k_unmapped_write16;
  104. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  105. m68k_write16_map[i] = (addr >> 1) | (1 << 31);
  106. }
  107. MAKE_68K_READ8(m68k_read8, m68k_read8_map)
  108. MAKE_68K_READ16(m68k_read16, m68k_read16_map)
  109. MAKE_68K_READ32(m68k_read32, m68k_read16_map)
  110. MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
  111. MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
  112. MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
  113. // -----------------------------------------------------------------
  114. static u32 ym2612_read_local_68k(void);
  115. static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
  116. static void z80_mem_setup(void);
  117. #ifdef EMU_CORE_DEBUG
  118. u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
  119. int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
  120. extern unsigned int ppop;
  121. #endif
  122. #ifdef IO_STATS
  123. void log_io(unsigned int addr, int bits, int rw);
  124. #elif defined(_MSC_VER)
  125. #define log_io
  126. #else
  127. #define log_io(...)
  128. #endif
  129. #if defined(EMU_C68K)
  130. static __inline int PicoMemBase(u32 pc)
  131. {
  132. int membase=0;
  133. if (pc<Pico.romsize+4)
  134. {
  135. membase=(int)Pico.rom; // Program Counter in Rom
  136. }
  137. else if ((pc&0xe00000)==0xe00000)
  138. {
  139. membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
  140. }
  141. else
  142. {
  143. // Error - Program Counter is invalid
  144. membase=(int)Pico.rom;
  145. }
  146. return membase;
  147. }
  148. #endif
  149. PICO_INTERNAL u32 PicoCheckPc(u32 pc)
  150. {
  151. u32 ret=0;
  152. #if defined(EMU_C68K)
  153. pc-=PicoCpuCM68k.membase; // Get real pc
  154. // pc&=0xfffffe;
  155. pc&=~1;
  156. if ((pc<<8) == 0)
  157. {
  158. elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",
  159. Pico.m.frame_count, Pico.m.scanline, SekPc);
  160. return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs
  161. }
  162. PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);
  163. PicoCpuCM68k.membase-=pc&0xff000000;
  164. ret = PicoCpuCM68k.membase+pc;
  165. #endif
  166. return ret;
  167. }
  168. PICO_INTERNAL void PicoInitPc(u32 pc)
  169. {
  170. PicoCheckPc(pc);
  171. }
  172. // -----------------------------------------------------------------
  173. // memmap helpers
  174. static int PadRead(int i)
  175. {
  176. int pad,value,data_reg;
  177. pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
  178. data_reg=Pico.ioports[i+1];
  179. // orr the bits, which are set as output
  180. value = data_reg&(Pico.ioports[i+4]|0x80);
  181. if (PicoOpt & POPT_6BTN_PAD)
  182. {
  183. int phase = Pico.m.padTHPhase[i];
  184. if(phase == 2 && !(data_reg&0x40)) { // TH
  185. value|=(pad&0xc0)>>2; // ?0SA 0000
  186. return value;
  187. } else if(phase == 3) {
  188. if(data_reg&0x40)
  189. value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
  190. else
  191. value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
  192. return value;
  193. }
  194. }
  195. if(data_reg&0x40) // TH
  196. value|=(pad&0x3f); // ?1CB RLDU
  197. else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
  198. return value; // will mirror later
  199. }
  200. static u32 io_ports_read(u32 a)
  201. {
  202. u32 d;
  203. a = (a>>1) & 0xf;
  204. switch (a) {
  205. case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
  206. case 1: d = PadRead(0); break;
  207. case 2: d = PadRead(1); break;
  208. default: d = Pico.ioports[a]; break; // IO ports can be used as RAM
  209. }
  210. return d;
  211. }
  212. static void io_ports_write(u32 a, u32 d)
  213. {
  214. a = (a>>1) & 0xf;
  215. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  216. if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))
  217. {
  218. Pico.m.padDelay[a - 1] = 0;
  219. if (!(Pico.ioports[a] & 0x40) && (d & 0x40))
  220. Pico.m.padTHPhase[a - 1]++;
  221. }
  222. // cartain IO ports can be used as RAM
  223. Pico.ioports[a] = d;
  224. }
  225. static void ctl_write_z80busreq(u32 d)
  226. {
  227. d&=1; d^=1;
  228. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  229. if (d ^ Pico.m.z80Run)
  230. {
  231. if (d)
  232. {
  233. z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
  234. }
  235. else
  236. {
  237. z80stopCycle = SekCyclesDone();
  238. if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
  239. PicoSyncZ80(z80stopCycle);
  240. }
  241. Pico.m.z80Run = d;
  242. }
  243. }
  244. static void ctl_write_z80reset(u32 d)
  245. {
  246. d&=1; d^=1;
  247. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  248. if (d ^ Pico.m.z80_reset)
  249. {
  250. if (d)
  251. {
  252. if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
  253. PicoSyncZ80(SekCyclesDone());
  254. YM2612ResetChip();
  255. timers_reset();
  256. }
  257. else
  258. {
  259. z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
  260. z80_reset();
  261. }
  262. Pico.m.z80_reset = d;
  263. }
  264. }
  265. // for nonstandard reads
  266. // TODO: mv to carthw
  267. u32 OtherRead16End(u32 a, int realsize)
  268. {
  269. u32 d=0;
  270. // 32x test
  271. /*
  272. if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA
  273. else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS
  274. else if (a == 0xa15100) { d = 0x0080; goto end; }
  275. else
  276. */
  277. // for games with simple protection devices, discovered by Haze
  278. // some dumb detection is used, but that should be enough to make things work
  279. if ((a>>22) == 1 && Pico.romsize >= 512*1024) {
  280. if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]
  281. if (a == 0x400000) { d=0x55<<8; goto end; }
  282. else if (a == 0x400002) { d=0x0f<<8; goto end; }
  283. }
  284. else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)
  285. if (a == 0x400000) { d=0x55<<8; goto end; }
  286. else if (a == 0x400002) { d=0x0f<<8; goto end; }
  287. else if (a == 0x400004) { d=0xaa<<8; goto end; }
  288. else if (a == 0x400006) { d=0xf0<<8; goto end; }
  289. }
  290. else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]
  291. if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }
  292. else if (a == 0x4a8820) { d=0x0a<<8; goto end; }
  293. // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case
  294. }
  295. else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]
  296. if (a == 0x400000) { d=0x90<<8; goto end; }
  297. else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then
  298. // checks the result, which is of the above one. Left it just in case.
  299. }
  300. else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)
  301. if (a == 0x400000) { d=0x55<<8; goto end; }
  302. else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails
  303. else if (a == 0x400002) { d=0x0f<<8; goto end; }
  304. else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above
  305. }
  306. // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])
  307. // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val
  308. // @ 400004 which is expected @ 400006, so we really remember 2 values here
  309. /// d = Pico.m.prot_bytes[(a>>2)&1]<<8;
  310. }
  311. else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {
  312. if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]
  313. d=0x0c; goto end;
  314. }
  315. else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]
  316. d=0x28; goto end; // does the check from RAM
  317. }
  318. else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]
  319. d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]
  320. }
  321. else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]
  322. d=0x0a; goto end;
  323. }
  324. }
  325. else if (a == 0xa13002) { // Pocket Monsters (Unl)
  326. d=0x01; goto end;
  327. }
  328. else if (a == 0xa1303E) { // Pocket Monsters (Unl)
  329. d=0x1f; goto end;
  330. }
  331. else if (a == 0x30fe02) {
  332. // Virtua Racing - just for fun
  333. // this seems to be some flag that SVP is ready or something similar
  334. d=1; goto end;
  335. }
  336. end:
  337. elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
  338. return d;
  339. }
  340. void OtherWrite8End(u32 a,u32 d,int realsize)
  341. {
  342. // for games with simple protection devices, discovered by Haze
  343. if ((a>>22) == 1)
  344. ;/// Pico.m.prot_bytes[(a>>2)&1] = (u8)d;
  345. }
  346. // -----------------------------------------------------------------
  347. // cart (save) RAM area (usually 0x200000 - ...)
  348. static u32 PicoRead8_sram(u32 a)
  349. {
  350. u32 d;
  351. if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))
  352. {
  353. if (SRam.flags & SRF_EEPROM) {
  354. d = EEPROM_read();
  355. if (!(a & 1))
  356. d >>= 8;
  357. } else
  358. d = *(u8 *)(SRam.data - SRam.start + a);
  359. elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
  360. return d;
  361. }
  362. // XXX: this is banking unfriendly
  363. if (a < Pico.romsize)
  364. return Pico.rom[a ^ 1];
  365. return m68k_unmapped_read8(a);
  366. }
  367. static u32 PicoRead16_sram(u32 a)
  368. {
  369. u32 d;
  370. if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))
  371. {
  372. if (SRam.flags & SRF_EEPROM)
  373. d = EEPROM_read();
  374. else {
  375. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  376. d = pm[0] << 8;
  377. d |= pm[1];
  378. }
  379. elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
  380. return d;
  381. }
  382. if (a < Pico.romsize)
  383. return *(u16 *)(Pico.rom + a);
  384. return m68k_unmapped_read16(a);
  385. }
  386. static void PicoWrite8_sram(u32 a, u32 d)
  387. {
  388. if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  389. m68k_unmapped_write8(a, d);
  390. return;
  391. }
  392. elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
  393. if (SRam.flags & SRF_EEPROM)
  394. {
  395. EEPROM_write8(a, d);
  396. }
  397. else {
  398. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  399. if (*pm != (u8)d) {
  400. SRam.changed = 1;
  401. *pm = (u8)d;
  402. }
  403. }
  404. }
  405. static void PicoWrite16_sram(u32 a, u32 d)
  406. {
  407. if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  408. m68k_unmapped_write16(a, d);
  409. return;
  410. }
  411. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
  412. if (SRam.flags & SRF_EEPROM)
  413. {
  414. EEPROM_write16(d);
  415. }
  416. else {
  417. // XXX: hardware could easily use MSB too..
  418. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  419. if (*pm != (u8)d) {
  420. SRam.changed = 1;
  421. *pm = (u8)d;
  422. }
  423. }
  424. }
  425. // z80 area (0xa00000 - 0xa0ffff)
  426. // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
  427. static u32 PicoRead8_z80(u32 a)
  428. {
  429. u32 d = 0xff;
  430. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  431. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  432. // open bus. Pulled down if MegaCD2 is attached.
  433. return 0;
  434. }
  435. if ((a & 0x4000) == 0x0000)
  436. d = Pico.zram[a & 0x1fff];
  437. else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
  438. d = ym2612_read_local_68k();
  439. else
  440. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  441. return d;
  442. }
  443. static u32 PicoRead16_z80(u32 a)
  444. {
  445. u32 d = PicoRead8_z80(a);
  446. return d | (d << 8);
  447. }
  448. static void PicoWrite8_z80(u32 a, u32 d)
  449. {
  450. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  451. // verified on real hw
  452. elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  453. return;
  454. }
  455. if ((a & 0x4000) == 0x0000) { // z80 RAM
  456. SekCyclesBurn(2); // hack
  457. Pico.zram[a & 0x1fff] = (u8)d;
  458. return;
  459. }
  460. if ((a & 0x6000) == 0x4000) { // FM Sound
  461. if (PicoOpt & POPT_EN_FM)
  462. emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;
  463. return;
  464. }
  465. // TODO: probably other VDP access too? Maybe more mirrors?
  466. if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
  467. if (PicoOpt & POPT_EN_PSG)
  468. SN76496Write(d);
  469. return;
  470. }
  471. #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
  472. if ((a & 0x7f00) == 0x6000) // Z80 BANK register
  473. {
  474. Pico.m.z80_bank68k >>= 1;
  475. Pico.m.z80_bank68k |= d << 8;
  476. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  477. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
  478. return;
  479. }
  480. #endif
  481. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
  482. }
  483. static void PicoWrite16_z80(u32 a, u32 d)
  484. {
  485. // for RAM, only most significant byte is sent
  486. // TODO: verify remaining accesses
  487. PicoWrite8_z80(a, d >> 8);
  488. }
  489. // IO/control area (0xa10000 - 0xa1ffff)
  490. u32 PicoRead8_io(u32 a)
  491. {
  492. u32 d;
  493. if ((a & 0xffe0) == 0x0000) { // I/O ports
  494. d = io_ports_read(a);
  495. goto end;
  496. }
  497. // faking open bus (MegaCD pulldowns don't work here curiously)
  498. d = Pico.m.rotate++;
  499. d ^= d << 6;
  500. // bit8 seems to be readable in this range
  501. if ((a & 0xfc01) == 0x1000)
  502. d &= ~0x01;
  503. if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
  504. d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
  505. elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);
  506. goto end;
  507. }
  508. d = m68k_unmapped_read8(a);
  509. end:
  510. return d;
  511. }
  512. u32 PicoRead16_io(u32 a)
  513. {
  514. u32 d;
  515. if ((a & 0xffe0) == 0x0000) { // I/O ports
  516. d = io_ports_read(a);
  517. goto end;
  518. }
  519. // faking open bus
  520. d = (Pico.m.rotate += 0x41);
  521. d ^= (d << 5) ^ (d << 8);
  522. // bit8 seems to be readable in this range
  523. if ((a & 0xfc00) == 0x1000)
  524. d &= ~0x0100;
  525. if ((a & 0xff00) == 0x1100) { // z80 busreq
  526. d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
  527. elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);
  528. goto end;
  529. }
  530. d = m68k_unmapped_read16(a);
  531. end:
  532. return d;
  533. }
  534. void PicoWrite8_io(u32 a, u32 d)
  535. {
  536. if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
  537. io_ports_write(a, d);
  538. return;
  539. }
  540. if ((a & 0xff01) == 0x1100) { // z80 busreq
  541. ctl_write_z80busreq(d);
  542. return;
  543. }
  544. if ((a & 0xff01) == 0x1200) { // z80 reset
  545. ctl_write_z80reset(d);
  546. return;
  547. }
  548. if (a == 0xa130f1) { // sram access register
  549. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  550. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  551. Pico.m.sram_reg |= (u8)(d & 3);
  552. return;
  553. }
  554. m68k_unmapped_write8(a, d);
  555. }
  556. void PicoWrite16_io(u32 a, u32 d)
  557. {
  558. if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
  559. io_ports_write(a, d);
  560. return;
  561. }
  562. if ((a & 0xff00) == 0x1100) { // z80 busreq
  563. ctl_write_z80busreq(d >> 8);
  564. return;
  565. }
  566. if ((a & 0xff00) == 0x1200) { // z80 reset
  567. ctl_write_z80reset(d >> 8);
  568. return;
  569. }
  570. if (a == 0xa130f0) { // sram access register
  571. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  572. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  573. Pico.m.sram_reg |= (u8)(d & 3);
  574. return;
  575. }
  576. m68k_unmapped_write16(a, d);
  577. }
  578. // VDP area (0xc00000 - 0xdfffff)
  579. // TODO: verify if lower byte goes to PSG on word writes
  580. static u32 PicoRead8_vdp(u32 a)
  581. {
  582. if ((a & 0x00e0) == 0x0000)
  583. return PicoVideoRead8(a);
  584. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  585. return 0;
  586. }
  587. static u32 PicoRead16_vdp(u32 a)
  588. {
  589. if ((a & 0x00e0) == 0x0000)
  590. return PicoVideoRead(a);
  591. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  592. return 0;
  593. }
  594. static void PicoWrite8_vdp(u32 a, u32 d)
  595. {
  596. if ((a & 0x00f9) == 0x0011) { // PSG Sound
  597. if (PicoOpt & POPT_EN_PSG)
  598. SN76496Write(d);
  599. return;
  600. }
  601. if ((a & 0x00e0) == 0x0000) {
  602. d &= 0xff;
  603. PicoVideoWrite(a, d | (d << 8));
  604. return;
  605. }
  606. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
  607. }
  608. static void PicoWrite16_vdp(u32 a, u32 d)
  609. {
  610. if ((a & 0x00f9) == 0x0010) { // PSG Sound
  611. if (PicoOpt & POPT_EN_PSG)
  612. SN76496Write(d);
  613. return;
  614. }
  615. if ((a & 0x00e0) == 0x0000) {
  616. PicoVideoWrite(a, d);
  617. return;
  618. }
  619. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  620. }
  621. // -----------------------------------------------------------------
  622. #ifdef EMU_M68K
  623. static void m68k_mem_setup(void);
  624. #endif
  625. PICO_INTERNAL void PicoMemSetup(void)
  626. {
  627. int mask, rs, a;
  628. // setup the memory map
  629. cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
  630. cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
  631. cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
  632. cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
  633. // ROM
  634. // align to bank size. We know ROM loader allocated enough for this
  635. mask = (1 << M68K_MEM_SHIFT) - 1;
  636. rs = (Pico.romsize + mask) & ~mask;
  637. cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
  638. cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
  639. // Common case of on-cart (save) RAM, usually at 0x200000-...
  640. if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {
  641. rs = SRam.end - SRam.start;
  642. rs = (rs + mask) & ~mask;
  643. if (SRam.start + rs >= 0x1000000)
  644. rs = 0x1000000 - SRam.start;
  645. cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);
  646. cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);
  647. cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);
  648. cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);
  649. }
  650. // Z80 region
  651. cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
  652. cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
  653. cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
  654. cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
  655. // IO/control region
  656. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
  657. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
  658. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
  659. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
  660. // VDP region
  661. for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
  662. if ((a & 0xe700e0) != 0xc00000)
  663. continue;
  664. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
  665. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
  666. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
  667. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
  668. }
  669. // RAM and it's mirrors
  670. for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
  671. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);
  672. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);
  673. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);
  674. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);
  675. }
  676. // Setup memory callbacks:
  677. #ifdef EMU_C68K
  678. PicoCpuCM68k.checkpc = PicoCheckPc;
  679. PicoCpuCM68k.fetch8 = PicoCpuCM68k.read8 = m68k_read8;
  680. PicoCpuCM68k.fetch16 = PicoCpuCM68k.read16 = m68k_read16;
  681. PicoCpuCM68k.fetch32 = PicoCpuCM68k.read32 = m68k_read32;
  682. PicoCpuCM68k.write8 = m68k_write8;
  683. PicoCpuCM68k.write16 = m68k_write16;
  684. PicoCpuCM68k.write32 = m68k_write32;
  685. #endif
  686. #ifdef EMU_F68K
  687. PicoCpuFM68k.read_byte = m68k_read8;
  688. PicoCpuFM68k.read_word = m68k_read16;
  689. PicoCpuFM68k.read_long = m68k_read32;
  690. PicoCpuFM68k.write_byte = m68k_write8;
  691. PicoCpuFM68k.write_word = m68k_write16;
  692. PicoCpuFM68k.write_long = m68k_write32;
  693. // setup FAME fetchmap
  694. {
  695. int i;
  696. // by default, point everything to first 64k of ROM
  697. for (i = 0; i < M68K_FETCHBANK1; i++)
  698. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  699. // now real ROM
  700. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  701. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
  702. // .. and RAM
  703. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  704. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
  705. }
  706. #endif
  707. #ifdef EMU_M68K
  708. m68k_mem_setup();
  709. #endif
  710. z80_mem_setup();
  711. }
  712. #ifdef EMU_M68K
  713. unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
  714. unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
  715. unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
  716. void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
  717. void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
  718. void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
  719. /* it appears that Musashi doesn't always mask the unused bits */
  720. unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
  721. unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
  722. unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
  723. void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
  724. void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
  725. void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
  726. static void m68k_mem_setup(void)
  727. {
  728. pm68k_read_memory_8 = m68k_read8;
  729. pm68k_read_memory_16 = m68k_read16;
  730. pm68k_read_memory_32 = m68k_read32;
  731. pm68k_write_memory_8 = m68k_write8;
  732. pm68k_write_memory_16 = m68k_write16;
  733. pm68k_write_memory_32 = m68k_write32;
  734. }
  735. #endif // EMU_M68K
  736. // -----------------------------------------------------------------
  737. static int get_scanline(int is_from_z80)
  738. {
  739. if (is_from_z80) {
  740. int cycles = z80_cyclesDone();
  741. while (cycles - z80_scanline_cycles >= 228)
  742. z80_scanline++, z80_scanline_cycles += 228;
  743. return z80_scanline;
  744. }
  745. return Pico.m.scanline;
  746. }
  747. /* probably should not be in this file, but it's near related code here */
  748. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
  749. {
  750. int xcycles = z80_cycles << 8;
  751. /* check for overflows */
  752. if ((mode_old & 4) && xcycles > timer_a_next_oflow)
  753. ym2612.OPN.ST.status |= 1;
  754. if ((mode_old & 8) && xcycles > timer_b_next_oflow)
  755. ym2612.OPN.ST.status |= 2;
  756. /* update timer a */
  757. if (mode_old & 1)
  758. while (xcycles > timer_a_next_oflow)
  759. timer_a_next_oflow += timer_a_step;
  760. if ((mode_old ^ mode_new) & 1) // turning on/off
  761. {
  762. if (mode_old & 1)
  763. timer_a_next_oflow = TIMER_NO_OFLOW;
  764. else
  765. timer_a_next_oflow = xcycles + timer_a_step;
  766. }
  767. if (mode_new & 1)
  768. elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);
  769. /* update timer b */
  770. if (mode_old & 2)
  771. while (xcycles > timer_b_next_oflow)
  772. timer_b_next_oflow += timer_b_step;
  773. if ((mode_old ^ mode_new) & 2)
  774. {
  775. if (mode_old & 2)
  776. timer_b_next_oflow = TIMER_NO_OFLOW;
  777. else
  778. timer_b_next_oflow = xcycles + timer_b_step;
  779. }
  780. if (mode_new & 2)
  781. elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);
  782. }
  783. // ym2612 DAC and timer I/O handlers for z80
  784. static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
  785. {
  786. int addr;
  787. a &= 3;
  788. if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
  789. {
  790. int scanline = get_scanline(is_from_z80);
  791. //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);
  792. ym2612.dacout = ((int)d - 0x80) << 6;
  793. if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)
  794. PsndDoDAC(scanline);
  795. return 0;
  796. }
  797. switch (a)
  798. {
  799. case 0: /* address port 0 */
  800. ym2612.OPN.ST.address = d;
  801. ym2612.addr_A1 = 0;
  802. #ifdef __GP2X__
  803. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  804. #endif
  805. return 0;
  806. case 1: /* data port 0 */
  807. if (ym2612.addr_A1 != 0)
  808. return 0;
  809. addr = ym2612.OPN.ST.address;
  810. ym2612.REGS[addr] = d;
  811. switch (addr)
  812. {
  813. case 0x24: // timer A High 8
  814. case 0x25: { // timer A Low 2
  815. int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
  816. : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
  817. if (ym2612.OPN.ST.TA != TAnew)
  818. {
  819. //elprintf(EL_STATUS, "timer a set %i", TAnew);
  820. ym2612.OPN.ST.TA = TAnew;
  821. //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  822. //ym2612.OPN.ST.TAT = 0;
  823. timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
  824. if (ym2612.OPN.ST.mode & 1) {
  825. // this is not right, should really be done on overflow only
  826. int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
  827. timer_a_next_oflow = (cycles << 8) + timer_a_step;
  828. }
  829. elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);
  830. }
  831. return 0;
  832. }
  833. case 0x26: // timer B
  834. if (ym2612.OPN.ST.TB != d) {
  835. //elprintf(EL_STATUS, "timer b set %i", d);
  836. ym2612.OPN.ST.TB = d;
  837. //ym2612.OPN.ST.TBC = (256-d) * 288;
  838. //ym2612.OPN.ST.TBT = 0;
  839. timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
  840. if (ym2612.OPN.ST.mode & 2) {
  841. int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
  842. timer_b_next_oflow = (cycles << 8) + timer_b_step;
  843. }
  844. elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);
  845. }
  846. return 0;
  847. case 0x27: { /* mode, timer control */
  848. int old_mode = ym2612.OPN.ST.mode;
  849. int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
  850. ym2612.OPN.ST.mode = d;
  851. elprintf(EL_YMTIMER, "st mode %02x", d);
  852. ym2612_sync_timers(cycles, old_mode, d);
  853. /* reset Timer a flag */
  854. if (d & 0x10)
  855. ym2612.OPN.ST.status &= ~1;
  856. /* reset Timer b flag */
  857. if (d & 0x20)
  858. ym2612.OPN.ST.status &= ~2;
  859. if ((d ^ old_mode) & 0xc0) {
  860. #ifdef __GP2X__
  861. if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
  862. #endif
  863. return 1;
  864. }
  865. return 0;
  866. }
  867. case 0x2b: { /* DAC Sel (YM2612) */
  868. int scanline = get_scanline(is_from_z80);
  869. ym2612.dacen = d & 0x80;
  870. if (d & 0x80) PsndDacLine = scanline;
  871. #ifdef __GP2X__
  872. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);
  873. #endif
  874. return 0;
  875. }
  876. }
  877. break;
  878. case 2: /* address port 1 */
  879. ym2612.OPN.ST.address = d;
  880. ym2612.addr_A1 = 1;
  881. #ifdef __GP2X__
  882. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  883. #endif
  884. return 0;
  885. case 3: /* data port 1 */
  886. if (ym2612.addr_A1 != 1)
  887. return 0;
  888. addr = ym2612.OPN.ST.address | 0x100;
  889. ym2612.REGS[addr] = d;
  890. break;
  891. }
  892. #ifdef __GP2X__
  893. if (PicoOpt & POPT_EXT_FM)
  894. return YM2612Write_940(a, d, get_scanline(is_from_z80));
  895. #endif
  896. return YM2612Write_(a, d);
  897. }
  898. #define ym2612_read_local() \
  899. if (xcycles >= timer_a_next_oflow) \
  900. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
  901. if (xcycles >= timer_b_next_oflow) \
  902. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
  903. static u32 MEMH_FUNC ym2612_read_local_z80(void)
  904. {
  905. int xcycles = z80_cyclesDone() << 8;
  906. ym2612_read_local();
  907. elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  908. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  909. return ym2612.OPN.ST.status;
  910. }
  911. static u32 ym2612_read_local_68k(void)
  912. {
  913. int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;
  914. ym2612_read_local();
  915. elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  916. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  917. return ym2612.OPN.ST.status;
  918. }
  919. void ym2612_pack_state(void)
  920. {
  921. // timers are saved as tick counts, in 16.16 int format
  922. int tac, tat = 0, tbc, tbt = 0;
  923. tac = 1024 - ym2612.OPN.ST.TA;
  924. tbc = 256 - ym2612.OPN.ST.TB;
  925. if (timer_a_next_oflow != TIMER_NO_OFLOW)
  926. tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);
  927. if (timer_b_next_oflow != TIMER_NO_OFLOW)
  928. tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);
  929. elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
  930. elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
  931. #ifdef __GP2X__
  932. if (PicoOpt & POPT_EXT_FM)
  933. YM2612PicoStateSave2_940(tat, tbt);
  934. else
  935. #endif
  936. YM2612PicoStateSave2(tat, tbt);
  937. }
  938. void ym2612_unpack_state(void)
  939. {
  940. int i, ret, tac, tat, tbc, tbt;
  941. YM2612PicoStateLoad();
  942. // feed all the registers and update internal state
  943. for (i = 0x20; i < 0xA0; i++) {
  944. ym2612_write_local(0, i, 0);
  945. ym2612_write_local(1, ym2612.REGS[i], 0);
  946. }
  947. for (i = 0x30; i < 0xA0; i++) {
  948. ym2612_write_local(2, i, 0);
  949. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  950. }
  951. for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
  952. ym2612_write_local(2, i, 0);
  953. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  954. ym2612_write_local(0, i, 0);
  955. ym2612_write_local(1, ym2612.REGS[i], 0);
  956. }
  957. for (i = 0xB0; i < 0xB8; i++) {
  958. ym2612_write_local(0, i, 0);
  959. ym2612_write_local(1, ym2612.REGS[i], 0);
  960. ym2612_write_local(2, i, 0);
  961. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  962. }
  963. #ifdef __GP2X__
  964. if (PicoOpt & POPT_EXT_FM)
  965. ret = YM2612PicoStateLoad2_940(&tat, &tbt);
  966. else
  967. #endif
  968. ret = YM2612PicoStateLoad2(&tat, &tbt);
  969. if (ret != 0) {
  970. elprintf(EL_STATUS, "old ym2612 state");
  971. return; // no saved timers
  972. }
  973. tac = (1024 - ym2612.OPN.ST.TA) << 16;
  974. tbc = (256 - ym2612.OPN.ST.TB) << 16;
  975. if (ym2612.OPN.ST.mode & 1)
  976. timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);
  977. else
  978. timer_a_next_oflow = TIMER_NO_OFLOW;
  979. if (ym2612.OPN.ST.mode & 2)
  980. timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);
  981. else
  982. timer_b_next_oflow = TIMER_NO_OFLOW;
  983. elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);
  984. elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);
  985. }
  986. // -----------------------------------------------------------------
  987. // z80 memhandlers
  988. static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)
  989. {
  990. // TODO?
  991. elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
  992. return 0xff;
  993. }
  994. static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)
  995. {
  996. extern unsigned int PicoReadM68k8(unsigned int a);
  997. unsigned int addr68k;
  998. unsigned char ret;
  999. addr68k = Pico.m.z80_bank68k<<15;
  1000. addr68k += a & 0x7fff;
  1001. ret = m68k_read8(addr68k);
  1002. elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
  1003. return ret;
  1004. }
  1005. static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)
  1006. {
  1007. if (PicoOpt & POPT_EN_FM)
  1008. emustatus |= ym2612_write_local(a, data, 1) & 1;
  1009. }
  1010. static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)
  1011. {
  1012. // TODO: allow full VDP access
  1013. if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
  1014. {
  1015. if (PicoOpt & POPT_EN_PSG)
  1016. SN76496Write(data);
  1017. return;
  1018. }
  1019. if ((a>>8) == 0x60)
  1020. {
  1021. Pico.m.z80_bank68k >>= 1;
  1022. Pico.m.z80_bank68k |= data << 8;
  1023. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  1024. return;
  1025. }
  1026. elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
  1027. }
  1028. static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)
  1029. {
  1030. extern void PicoWriteM68k8(unsigned int a, unsigned char d);
  1031. unsigned int addr68k;
  1032. addr68k = Pico.m.z80_bank68k << 15;
  1033. addr68k += a & 0x7fff;
  1034. elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
  1035. m68k_write8(addr68k, data);
  1036. }
  1037. // -----------------------------------------------------------------
  1038. static unsigned char z80_md_in(unsigned short p)
  1039. {
  1040. elprintf(EL_ANOMALY, "Z80 port %04x read", p);
  1041. return 0xff;
  1042. }
  1043. static void z80_md_out(unsigned short p, unsigned char d)
  1044. {
  1045. elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
  1046. }
  1047. static void z80_mem_setup(void)
  1048. {
  1049. z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);
  1050. z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);
  1051. z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
  1052. z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
  1053. z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
  1054. z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);
  1055. z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);
  1056. z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
  1057. z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
  1058. z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
  1059. #ifdef _USE_DRZ80
  1060. drZ80.z80_in = z80_md_in;
  1061. drZ80.z80_out = z80_md_out;
  1062. #endif
  1063. #ifdef _USE_CZ80
  1064. Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM
  1065. Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror
  1066. Cz80_Set_INPort(&CZ80, z80_md_in);
  1067. Cz80_Set_OUTPort(&CZ80, z80_md_out);
  1068. #endif
  1069. }