memory.c 31 KB

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  1. // Memory I/O handlers for Sega/Mega CD.
  2. // (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas
  3. #include "../pico_int.h"
  4. #include "../memory.h"
  5. #include "gfx_cd.h"
  6. #include "pcm.h"
  7. unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  8. unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  9. unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  10. unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  11. MAKE_68K_READ8(s68k_read8, s68k_read8_map)
  12. MAKE_68K_READ16(s68k_read16, s68k_read16_map)
  13. MAKE_68K_READ32(s68k_read32, s68k_read16_map)
  14. MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
  15. MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
  16. MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
  17. // -----------------------------------------------------------------
  18. // poller detection
  19. #define POLL_LIMIT 16
  20. #define POLL_CYCLES 124
  21. unsigned int s68k_poll_adclk, s68k_poll_cnt;
  22. #ifndef _ASM_CD_MEMORY_C
  23. static u32 m68k_reg_read16(u32 a)
  24. {
  25. u32 d=0;
  26. a &= 0x3e;
  27. switch (a) {
  28. case 0:
  29. d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
  30. goto end;
  31. case 2:
  32. d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
  33. elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
  34. goto end;
  35. case 4:
  36. d = Pico_mcd->s68k_regs[4]<<8;
  37. goto end;
  38. case 6:
  39. d = *(u16 *)(Pico_mcd->bios + 0x72);
  40. goto end;
  41. case 8:
  42. d = Read_CDC_Host(0);
  43. goto end;
  44. case 0xA:
  45. elprintf(EL_UIO, "m68k FIXME: reserved read");
  46. goto end;
  47. case 0xC:
  48. d = Pico_mcd->m.timer_stopwatch >> 16;
  49. elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
  50. goto end;
  51. }
  52. if (a < 0x30) {
  53. // comm flag/cmd/status (0xE-0x2F)
  54. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  55. goto end;
  56. }
  57. elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
  58. end:
  59. return d;
  60. }
  61. #endif
  62. #ifndef _ASM_CD_MEMORY_C
  63. static
  64. #endif
  65. void m68k_reg_write8(u32 a, u32 d)
  66. {
  67. u32 dold;
  68. a &= 0x3f;
  69. switch (a) {
  70. case 0:
  71. d &= 1;
  72. if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
  73. return;
  74. case 1:
  75. d &= 3;
  76. if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
  77. if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
  78. if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
  79. if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
  80. SekResetS68k(); // S68k comes out of RESET or BRQ state
  81. Pico_mcd->m.state_flags&=~1;
  82. elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);
  83. }
  84. if (!(d & 1))
  85. d |= 2; // verified: reset also gives bus
  86. if ((d ^ Pico_mcd->m.busreq) & 2)
  87. PicoMemRemapCD(Pico_mcd->s68k_regs[3]);
  88. Pico_mcd->m.busreq = d;
  89. return;
  90. case 2:
  91. elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
  92. Pico_mcd->s68k_regs[2] = d; // really use s68k side register
  93. return;
  94. case 3:
  95. dold = Pico_mcd->s68k_regs[3];
  96. elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
  97. //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
  98. //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
  99. // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
  100. if (dold & 4) { // 1M mode
  101. d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
  102. } else {
  103. if ((d ^ dold) & d & 2) { // DMNA is being set
  104. dold &= ~1; // return word RAM to s68k
  105. /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
  106. SekEndRun(20+16+10+12+16);
  107. }
  108. }
  109. Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);
  110. if ((d ^ dold) & 0xc0) {
  111. elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
  112. PicoMemRemapCD(Pico_mcd->s68k_regs[3]);
  113. }
  114. #ifdef USE_POLL_DETECT
  115. if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
  116. SekSetStopS68k(0); s68k_poll_adclk = 0;
  117. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  118. }
  119. #endif
  120. return;
  121. case 6:
  122. Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
  123. return;
  124. case 7:
  125. Pico_mcd->bios[0x72] = d;
  126. elprintf(EL_CDREGS, "hint vector set to %04x%04x",
  127. ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
  128. return;
  129. case 0xf:
  130. d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
  131. case 0xe:
  132. //dprintf("m68k: comm flag: %02x", d);
  133. Pico_mcd->s68k_regs[0xe] = d;
  134. #ifdef USE_POLL_DETECT
  135. if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
  136. SekSetStopS68k(0); s68k_poll_adclk = 0;
  137. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  138. }
  139. #endif
  140. return;
  141. }
  142. if ((a&0xf0) == 0x10) {
  143. Pico_mcd->s68k_regs[a] = d;
  144. #ifdef USE_POLL_DETECT
  145. if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
  146. SekSetStopS68k(0); s68k_poll_adclk = 0;
  147. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  148. }
  149. #endif
  150. return;
  151. }
  152. elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
  153. }
  154. #ifndef _ASM_CD_MEMORY_C
  155. static
  156. #endif
  157. u32 s68k_poll_detect(u32 a, u32 d)
  158. {
  159. #ifdef USE_POLL_DETECT
  160. // needed mostly for Cyclone, which doesn't always check it's cycle counter
  161. if (SekIsStoppedS68k()) return d;
  162. // polling detection
  163. if (a == (s68k_poll_adclk&0xff)) {
  164. unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
  165. if (clkdiff <= POLL_CYCLES) {
  166. s68k_poll_cnt++;
  167. //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
  168. if (s68k_poll_cnt > POLL_LIMIT) {
  169. SekSetStopS68k(1);
  170. elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
  171. }
  172. s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
  173. return d;
  174. }
  175. }
  176. s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
  177. s68k_poll_cnt = 0;
  178. #endif
  179. return d;
  180. }
  181. #define READ_FONT_DATA(basemask) \
  182. { \
  183. unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
  184. unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
  185. if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
  186. if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
  187. if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
  188. if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
  189. }
  190. #ifndef _ASM_CD_MEMORY_C
  191. static
  192. #endif
  193. u32 s68k_reg_read16(u32 a)
  194. {
  195. u32 d=0;
  196. switch (a) {
  197. case 0:
  198. return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
  199. case 2:
  200. d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
  201. elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
  202. return s68k_poll_detect(a, d);
  203. case 6:
  204. return CDC_Read_Reg();
  205. case 8:
  206. return Read_CDC_Host(1); // Gens returns 0 here on byte reads
  207. case 0xC:
  208. d = Pico_mcd->m.timer_stopwatch >> 16;
  209. elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
  210. return d;
  211. case 0x30:
  212. elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
  213. return Pico_mcd->s68k_regs[31];
  214. case 0x34: // fader
  215. return 0; // no busy bit
  216. case 0x50: // font data (check: Lunar 2, Silpheed)
  217. READ_FONT_DATA(0x00100000);
  218. return d;
  219. case 0x52:
  220. READ_FONT_DATA(0x00010000);
  221. return d;
  222. case 0x54:
  223. READ_FONT_DATA(0x10000000);
  224. return d;
  225. case 0x56:
  226. READ_FONT_DATA(0x01000000);
  227. return d;
  228. }
  229. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  230. if (a >= 0x0e && a < 0x30)
  231. return s68k_poll_detect(a, d);
  232. return d;
  233. }
  234. #ifndef _ASM_CD_MEMORY_C
  235. static
  236. #endif
  237. void s68k_reg_write8(u32 a, u32 d)
  238. {
  239. // Warning: d might have upper bits set
  240. switch (a) {
  241. case 2:
  242. return; // only m68k can change WP
  243. case 3: {
  244. int dold = Pico_mcd->s68k_regs[3];
  245. elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
  246. d &= 0x1d;
  247. d |= dold & 0xc2;
  248. if (d & 4)
  249. {
  250. if ((d ^ dold) & 5) {
  251. d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
  252. PicoMemRemapCD(d);
  253. }
  254. #ifdef _ASM_CD_MEMORY_C
  255. if ((d ^ dold) & 0x1d)
  256. PicoMemResetCDdecode(d);
  257. #endif
  258. if (!(dold & 4)) {
  259. elprintf(EL_CDREG3, "wram mode 2M->1M");
  260. wram_2M_to_1M(Pico_mcd->word_ram2M);
  261. }
  262. }
  263. else
  264. {
  265. if (dold & 4) {
  266. elprintf(EL_CDREG3, "wram mode 1M->2M");
  267. if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
  268. d &= ~3;
  269. d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
  270. }
  271. wram_1M_to_2M(Pico_mcd->word_ram2M);
  272. PicoMemRemapCD(d);
  273. }
  274. // s68k can only set RET, writing 0 has no effect
  275. else if ((dold ^ d) & d & 1) { // RET being set
  276. SekEndRunS68k(20+16+10+12+16); // see DMNA case
  277. } else
  278. d |= dold & 1;
  279. if (d & 1)
  280. d &= ~2; // DMNA clears
  281. }
  282. break;
  283. }
  284. case 4:
  285. elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
  286. Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
  287. return;
  288. case 5:
  289. //dprintf("s68k CDC reg addr: %x", d&0xf);
  290. break;
  291. case 7:
  292. CDC_Write_Reg(d);
  293. return;
  294. case 0xa:
  295. elprintf(EL_CDREGS, "s68k set CDC dma addr");
  296. break;
  297. case 0xc:
  298. case 0xd:
  299. elprintf(EL_CDREGS, "s68k set stopwatch timer");
  300. Pico_mcd->m.timer_stopwatch = 0;
  301. return;
  302. case 0xe:
  303. Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
  304. return;
  305. case 0x31:
  306. elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);
  307. Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
  308. break;
  309. case 0x33: // IRQ mask
  310. elprintf(EL_CDREGS, "s68k irq mask: %02x", d);
  311. if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
  312. CDD_Export_Status();
  313. }
  314. break;
  315. case 0x34: // fader
  316. Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
  317. return;
  318. case 0x36:
  319. return; // d/m bit is unsetable
  320. case 0x37: {
  321. u32 d_old = Pico_mcd->s68k_regs[0x37];
  322. Pico_mcd->s68k_regs[0x37] = d&7;
  323. if ((d&4) && !(d_old&4)) {
  324. CDD_Export_Status();
  325. }
  326. return;
  327. }
  328. case 0x4b:
  329. Pico_mcd->s68k_regs[a] = (u8) d;
  330. CDD_Import_Command();
  331. return;
  332. }
  333. if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
  334. {
  335. elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
  336. return;
  337. }
  338. Pico_mcd->s68k_regs[a] = (u8) d;
  339. }
  340. // -----------------------------------------------------------------
  341. // Main 68k
  342. // -----------------------------------------------------------------
  343. #ifndef _ASM_CD_MEMORY_C
  344. #include "cell_map.c"
  345. #endif
  346. // WORD RAM, cell aranged area (220000 - 23ffff)
  347. static u32 PicoReadM68k8_cell(u32 a)
  348. {
  349. int bank = Pico_mcd->s68k_regs[3] & 1;
  350. a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
  351. return Pico_mcd->word_ram1M[bank][a ^ 1];
  352. }
  353. static u32 PicoReadM68k16_cell(u32 a)
  354. {
  355. int bank = Pico_mcd->s68k_regs[3] & 1;
  356. a = (a&2) | (cell_map(a >> 2) << 2);
  357. return *(u16 *)(Pico_mcd->word_ram1M[bank] + a);
  358. }
  359. static void PicoWriteM68k8_cell(u32 a, u32 d)
  360. {
  361. int bank = Pico_mcd->s68k_regs[3] & 1;
  362. a = (a&3) | (cell_map(a >> 2) << 2);
  363. Pico_mcd->word_ram1M[bank][a ^ 1] = d;
  364. }
  365. static void PicoWriteM68k16_cell(u32 a, u32 d)
  366. {
  367. int bank = Pico_mcd->s68k_regs[3] & 1;
  368. a = (a&3) | (cell_map(a >> 2) << 2);
  369. *(u16 *)(Pico_mcd->word_ram1M[bank] + a) = d;
  370. }
  371. // RAM cart (40000 - 7fffff, optional)
  372. static u32 PicoReadM68k8_ramc(u32 a)
  373. {
  374. u32 d = 0;
  375. if (a == 0x400001) {
  376. if (SRam.data != NULL)
  377. d = 3; // 64k cart
  378. return d;
  379. }
  380. if ((a & 0xfe0000) == 0x600000) {
  381. if (SRam.data != NULL)
  382. d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
  383. return d;
  384. }
  385. if (a == 0x7fffff)
  386. return Pico_mcd->m.bcram_reg;
  387. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  388. return d;
  389. }
  390. static u32 PicoReadM68k16_ramc(u32 a)
  391. {
  392. elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
  393. return PicoReadM68k8_ramc(a + 1);
  394. }
  395. static void PicoWriteM68k8_ramc(u32 a, u32 d)
  396. {
  397. if ((a & 0xfe0000) == 0x600000) {
  398. if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
  399. SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
  400. SRam.changed = 1;
  401. }
  402. return;
  403. }
  404. if (a == 0x7fffff) {
  405. Pico_mcd->m.bcram_reg = d;
  406. return;
  407. }
  408. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  409. }
  410. static void PicoWriteM68k16_ramc(u32 a, u32 d)
  411. {
  412. elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  413. PicoWriteM68k8_ramc(a + 1, d);
  414. }
  415. // IO/control/cd registers (a10000 - ...)
  416. static u32 PicoReadM68k8_io(u32 a)
  417. {
  418. u32 d;
  419. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  420. d = m68k_reg_read16(a); // TODO: m68k_reg_read8
  421. if (!(a & 1))
  422. d >>= 8;
  423. d &= 0xff;
  424. elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);
  425. return d;
  426. }
  427. // fallback to default MD handler
  428. return PicoRead8_io(a);
  429. }
  430. static u32 PicoReadM68k16_io(u32 a)
  431. {
  432. u32 d;
  433. if ((a & 0xff00) == 0x2000) {
  434. d = m68k_reg_read16(a);
  435. elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);
  436. return d;
  437. }
  438. return PicoRead16_io(a);
  439. }
  440. static void PicoWriteM68k8_io(u32 a, u32 d)
  441. {
  442. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  443. elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
  444. m68k_reg_write8(a, d);
  445. return;
  446. }
  447. PicoWrite16_io(a, d);
  448. }
  449. static void PicoWriteM68k16_io(u32 a, u32 d)
  450. {
  451. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  452. elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
  453. /* TODO FIXME?
  454. if (a == 0xe) { // special case, 2 byte writes would be handled differently
  455. Pico_mcd->s68k_regs[0xe] = d >> 8;
  456. #ifdef USE_POLL_DETECT
  457. if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
  458. SekSetStopS68k(0); s68k_poll_adclk = 0;
  459. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  460. }
  461. #endif
  462. return;
  463. }
  464. */
  465. m68k_reg_write8(a, d >> 8);
  466. m68k_reg_write8(a + 1, d & 0xff);
  467. return;
  468. }
  469. PicoWrite16_io(a, d);
  470. }
  471. // -----------------------------------------------------------------
  472. // Sub 68k
  473. // -----------------------------------------------------------------
  474. static u32 s68k_unmapped_read8(u32 a)
  475. {
  476. elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
  477. return 0;
  478. }
  479. static u32 s68k_unmapped_read16(u32 a)
  480. {
  481. elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
  482. return 0;
  483. }
  484. static void s68k_unmapped_write8(u32 a, u32 d)
  485. {
  486. elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  487. }
  488. static void s68k_unmapped_write16(u32 a, u32 d)
  489. {
  490. elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  491. }
  492. // decode (080000 - 0bffff, in 1M mode)
  493. static u32 PicoReadS68k8_dec(u32 a)
  494. {
  495. u32 d, bank;
  496. bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;
  497. d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];
  498. if (a & 1)
  499. d &= 0x0f;
  500. else
  501. d >>= 4;
  502. return d;
  503. }
  504. static u32 PicoReadS68k16_dec(u32 a)
  505. {
  506. u32 d, bank;
  507. bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;
  508. d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];
  509. d |= d << 4;
  510. d &= ~0xf0;
  511. return d;
  512. }
  513. /* check: jaguar xj 220 (draws entire world using decode) */
  514. static void PicoWriteS68k8_dec(u32 a, u32 d)
  515. {
  516. u8 r3 = Pico_mcd->s68k_regs[3];
  517. u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];
  518. u8 oldmask = (a & 1) ? 0xf0 : 0x0f;
  519. r3 &= 0x18;
  520. d &= 0x0f;
  521. if (!(a & 1))
  522. d <<= 4;
  523. if (r3 == 8) {
  524. if ((!(*pd & (~oldmask))) && d)
  525. goto do_it;
  526. } else if (r3 > 8) {
  527. if (d)
  528. goto do_it;
  529. } else
  530. goto do_it;
  531. return;
  532. do_it:
  533. *pd = d | (*pd & oldmask);
  534. }
  535. static void PicoWriteS68k16_dec(u32 a, u32 d)
  536. {
  537. u8 r3 = Pico_mcd->s68k_regs[3];
  538. u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];
  539. //if ((a & 0x3ffff) < 0x28000) return;
  540. r3 &= 0x18;
  541. d &= 0x0f0f;
  542. d |= d >> 4;
  543. if (r3 == 8) {
  544. u8 dold = *pd;
  545. if (!(dold & 0xf0)) dold |= d & 0xf0;
  546. if (!(dold & 0x0f)) dold |= d & 0x0f;
  547. *pd = dold;
  548. } else if (r3 > 8) {
  549. u8 dold = *pd;
  550. if (!(d & 0xf0)) d |= dold & 0xf0;
  551. if (!(d & 0x0f)) d |= dold & 0x0f;
  552. *pd = d;
  553. } else {
  554. *pd = d;
  555. }
  556. }
  557. // backup RAM (fe0000 - feffff)
  558. static u32 PicoReadS68k8_bram(u32 a)
  559. {
  560. return Pico_mcd->bram[(a>>1)&0x1fff];
  561. }
  562. static u32 PicoReadS68k16_bram(u32 a)
  563. {
  564. u32 d;
  565. elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
  566. a = (a >> 1) & 0x1fff;
  567. d = Pico_mcd->bram[a++];
  568. d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
  569. return d;
  570. }
  571. static void PicoWriteS68k8_bram(u32 a, u32 d)
  572. {
  573. Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
  574. SRam.changed = 1;
  575. }
  576. static void PicoWriteS68k16_bram(u32 a, u32 d)
  577. {
  578. elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  579. a = (a >> 1) & 0x1fff;
  580. Pico_mcd->bram[a++] = d;
  581. Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
  582. SRam.changed = 1;
  583. }
  584. // PCM and registers (ff0000 - ffffff)
  585. static u32 PicoReadS68k8_pr(u32 a)
  586. {
  587. u32 d = 0;
  588. // regs
  589. if ((a & 0xfe00) == 0x8000) {
  590. a &= 0x1ff;
  591. elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
  592. if (a >= 0x0e && a < 0x30) {
  593. d = Pico_mcd->s68k_regs[a];
  594. s68k_poll_detect(a, d);
  595. elprintf(EL_CDREGS, "ret = %02x", (u8)d);
  596. return d;
  597. }
  598. else if (a >= 0x58 && a < 0x68)
  599. d = gfx_cd_read(a & ~1);
  600. else d = s68k_reg_read16(a & ~1);
  601. if (!(a & 1))
  602. d >>= 8;
  603. elprintf(EL_CDREGS, "ret = %02x", (u8)d);
  604. return d & 0xff;
  605. }
  606. // PCM
  607. if ((a & 0x8000) == 0x0000) {
  608. a &= 0x7fff;
  609. if (a >= 0x2000)
  610. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  611. else if (a >= 0x20) {
  612. a &= 0x1e;
  613. d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
  614. if (a & 2)
  615. d >>= 8;
  616. }
  617. return d & 0xff;
  618. }
  619. return s68k_unmapped_read8(a);
  620. }
  621. static u32 PicoReadS68k16_pr(u32 a)
  622. {
  623. u32 d = 0;
  624. // regs
  625. if ((a & 0xfe00) == 0x8000) {
  626. a &= 0x1fe;
  627. elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
  628. if (0x58 <= a && a < 0x68)
  629. d = gfx_cd_read(a);
  630. else d = s68k_reg_read16(a);
  631. elprintf(EL_CDREGS, "ret = %04x", d);
  632. return d;
  633. }
  634. // PCM
  635. if ((a & 0x8000) == 0x0000) {
  636. //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
  637. a &= 0x7fff;
  638. if (a >= 0x2000)
  639. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
  640. else if (a >= 0x20) {
  641. a &= 0x1e;
  642. d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
  643. if (a & 2) d >>= 8;
  644. }
  645. elprintf(EL_CDREGS, "ret = %04x", d);
  646. return d;
  647. }
  648. return s68k_unmapped_read16(a);
  649. }
  650. static void PicoWriteS68k8_pr(u32 a, u32 d)
  651. {
  652. // regs
  653. if ((a & 0xfe00) == 0x8000) {
  654. a &= 0x1ff;
  655. elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
  656. if (0x58 <= a && a < 0x68)
  657. gfx_cd_write16(a&~1, (d<<8)|d);
  658. else s68k_reg_write8(a,d);
  659. return;
  660. }
  661. // PCM
  662. if ((a & 0x8000) == 0x0000) {
  663. a &= 0x7fff;
  664. if (a >= 0x2000)
  665. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  666. else if (a < 0x12)
  667. pcm_write(a>>1, d);
  668. return;
  669. }
  670. s68k_unmapped_write8(a, d);
  671. }
  672. static void PicoWriteS68k16_pr(u32 a, u32 d)
  673. {
  674. // regs
  675. if ((a & 0xfe00) == 0x8000) {
  676. a &= 0x1fe;
  677. elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
  678. if (a >= 0x58 && a < 0x68)
  679. gfx_cd_write16(a, d);
  680. else {
  681. if (a == 0xe) {
  682. // special case, 2 byte writes would be handled differently
  683. // TODO: verify
  684. Pico_mcd->s68k_regs[0xf] = d;
  685. return;
  686. }
  687. s68k_reg_write8(a, d >> 8);
  688. s68k_reg_write8(a + 1, d & 0xff);
  689. }
  690. return;
  691. }
  692. // PCM
  693. if ((a & 0x8000) == 0x0000) {
  694. a &= 0x7fff;
  695. if (a >= 0x2000)
  696. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  697. else if (a < 0x12)
  698. pcm_write(a>>1, d & 0xff);
  699. return;
  700. }
  701. s68k_unmapped_write16(a, d);
  702. }
  703. // -----------------------------------------------------------------
  704. #ifdef EMU_C68K
  705. static __inline int PicoMemBaseM68k(u32 pc)
  706. {
  707. if ((pc&0xe00000)==0xe00000)
  708. return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
  709. if (pc < 0x20000)
  710. return (int)Pico_mcd->bios; // Program Counter in BIOS
  711. if ((pc&0xfc0000)==0x200000)
  712. {
  713. if (!(Pico_mcd->s68k_regs[3]&4))
  714. return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
  715. if (pc < 0x220000) {
  716. int bank = Pico_mcd->s68k_regs[3]&1;
  717. return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
  718. }
  719. }
  720. // Error - Program Counter is invalid
  721. elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);
  722. return (int)Pico_mcd->bios;
  723. }
  724. static u32 PicoCheckPcM68k(u32 pc)
  725. {
  726. pc-=PicoCpuCM68k.membase; // Get real pc
  727. pc&=0xfffffe;
  728. PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
  729. return PicoCpuCM68k.membase+pc;
  730. }
  731. static __inline int PicoMemBaseS68k(u32 pc)
  732. {
  733. if (pc < 0x80000) // PRG RAM
  734. return (int)Pico_mcd->prg_ram;
  735. if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
  736. return (int)Pico_mcd->word_ram2M - 0x080000;
  737. if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
  738. int bank = (Pico_mcd->s68k_regs[3]&1)^1;
  739. return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
  740. }
  741. // Error - Program Counter is invalid
  742. elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);
  743. return (int)Pico_mcd->prg_ram;
  744. }
  745. static u32 PicoCheckPcS68k(u32 pc)
  746. {
  747. pc-=PicoCpuCS68k.membase; // Get real pc
  748. pc&=0xfffffe;
  749. PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
  750. return PicoCpuCS68k.membase+pc;
  751. }
  752. #endif
  753. // TODO: probably split
  754. void PicoMemRemapCD(int r3)
  755. {
  756. void *bank;
  757. // PRG RAM
  758. if (Pico_mcd->m.busreq & 2) {
  759. bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];
  760. cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
  761. }
  762. else {
  763. m68k_map_unmap(0x020000, 0x03ffff);
  764. }
  765. // WORD RAM
  766. if (!(r3 & 4)) {
  767. // 2M mode. XXX: allowing access in all cases for simplicity
  768. bank = Pico_mcd->word_ram2M;
  769. cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
  770. cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
  771. // TODO: handle 0x0c0000
  772. }
  773. else {
  774. bank = Pico_mcd->word_ram1M[r3 & 1];
  775. cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
  776. bank = Pico_mcd->word_ram1M[(r3 & 1) ^ 1];
  777. cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
  778. // "cell arrange" on m68k
  779. cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, PicoReadM68k8_cell, 1);
  780. cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, PicoReadM68k16_cell, 1);
  781. cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, PicoWriteM68k8_cell, 1);
  782. cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, PicoWriteM68k16_cell, 1);
  783. // "decode format" on s68k
  784. cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, PicoReadS68k8_dec, 1);
  785. cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, PicoReadS68k16_dec, 1);
  786. cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, PicoWriteS68k8_dec, 1);
  787. cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, PicoWriteS68k16_dec, 1);
  788. }
  789. #ifdef EMU_F68K
  790. // update fetchmap..
  791. int i;
  792. if (!(r3 & 4))
  793. {
  794. for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
  795. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
  796. }
  797. else
  798. {
  799. for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
  800. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
  801. for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
  802. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
  803. }
  804. #endif
  805. }
  806. #ifdef EMU_M68K
  807. static void m68k_mem_setup_cd(void);
  808. #endif
  809. PICO_INTERNAL void PicoMemSetupCD(void)
  810. {
  811. // setup default main68k map
  812. PicoMemSetup();
  813. // PicoMemRemapCD() will set up RAMs, so not done here
  814. // main68k map (BIOS mapped by PicoMemSetup()):
  815. // RAM cart
  816. if (PicoOpt & POPT_EN_MCD_RAMCART) {
  817. cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
  818. cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
  819. cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
  820. cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
  821. }
  822. // registers/IO:
  823. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);
  824. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);
  825. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);
  826. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);
  827. // sub68k map
  828. cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
  829. cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
  830. cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
  831. cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
  832. // PRG RAM
  833. cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  834. cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  835. cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  836. cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  837. // BRAM
  838. cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
  839. cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
  840. cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
  841. cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
  842. // PCM, regs
  843. cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
  844. cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
  845. cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
  846. cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
  847. #ifdef EMU_C68K
  848. PicoCpuCM68k.checkpc = PicoCheckPcM68k;
  849. // s68k
  850. PicoCpuCS68k.checkpc = PicoCheckPcS68k;
  851. PicoCpuCS68k.fetch8 = PicoCpuCS68k.read8 = s68k_read8;
  852. PicoCpuCS68k.fetch16 = PicoCpuCS68k.read16 = s68k_read16;
  853. PicoCpuCS68k.fetch32 = PicoCpuCS68k.read32 = s68k_read32;
  854. PicoCpuCS68k.write8 = s68k_write8;
  855. PicoCpuCS68k.write16 = s68k_write16;
  856. PicoCpuCS68k.write32 = s68k_write32;
  857. #endif
  858. #ifdef EMU_F68K
  859. // s68k
  860. PicoCpuFS68k.read_byte = s68k_read8;
  861. PicoCpuFS68k.read_word = s68k_read16;
  862. PicoCpuFS68k.read_long = s68k_read32;
  863. PicoCpuFS68k.write_byte = s68k_write8;
  864. PicoCpuFS68k.write_word = s68k_write16;
  865. PicoCpuFS68k.write_long = s68k_write32;
  866. // setup FAME fetchmap
  867. {
  868. int i;
  869. // M68k
  870. // by default, point everything to fitst 64k of ROM (BIOS)
  871. for (i = 0; i < M68K_FETCHBANK1; i++)
  872. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  873. // now real ROM (BIOS)
  874. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  875. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
  876. // .. and RAM
  877. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  878. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
  879. // S68k
  880. // PRG RAM is default
  881. for (i = 0; i < M68K_FETCHBANK1; i++)
  882. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
  883. // real PRG RAM
  884. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
  885. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
  886. // WORD RAM 2M area
  887. for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
  888. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
  889. // PicoMemRemapCD() will setup word ram for both
  890. }
  891. #endif
  892. #ifdef EMU_M68K
  893. m68k_mem_setup_cd();
  894. #endif
  895. // m68k_poll_addr = m68k_poll_cnt = 0;
  896. s68k_poll_adclk = s68k_poll_cnt = 0;
  897. }
  898. #ifdef EMU_M68K
  899. u32 m68k_read8(u32 a);
  900. u32 m68k_read16(u32 a);
  901. u32 m68k_read32(u32 a);
  902. void m68k_write8(u32 a, u8 d);
  903. void m68k_write16(u32 a, u16 d);
  904. void m68k_write32(u32 a, u32 d);
  905. static unsigned int PicoReadCD8w (unsigned int a) {
  906. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
  907. }
  908. static unsigned int PicoReadCD16w(unsigned int a) {
  909. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
  910. }
  911. static unsigned int PicoReadCD32w(unsigned int a) {
  912. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
  913. }
  914. static void PicoWriteCD8w (unsigned int a, unsigned char d) {
  915. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
  916. }
  917. static void PicoWriteCD16w(unsigned int a, unsigned short d) {
  918. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
  919. }
  920. static void PicoWriteCD32w(unsigned int a, unsigned int d) {
  921. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
  922. }
  923. extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
  924. extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
  925. extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
  926. extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
  927. extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
  928. extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
  929. static void m68k_mem_setup_cd(void)
  930. {
  931. pm68k_read_memory_8 = PicoReadCD8w;
  932. pm68k_read_memory_16 = PicoReadCD16w;
  933. pm68k_read_memory_32 = PicoReadCD32w;
  934. pm68k_write_memory_8 = PicoWriteCD8w;
  935. pm68k_write_memory_16 = PicoWriteCD16w;
  936. pm68k_write_memory_32 = PicoWriteCD32w;
  937. }
  938. #endif // EMU_M68K