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@@ -427,213 +427,42 @@ typedef struct {
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static int rcache_get_tmp(void);
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static void rcache_free_tmp(int hr);
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-// Note: cache_regs[] must have at least the amount of REG/TEMP registers used
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-// by handlers in worst case (currently 4).
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-// Register assignment goes by ABI convention. Caller save registers are TEMP,
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-// the others are either static or REG. SR must be static, R0 very recommended.
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+// Note: Register assignment goes by ABI convention. Caller save registers are
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+// TEMPORARY, the others are PRESERVED. Unusable regs are omitted.
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+// there must be at least the free (not context or statically mapped) amount of
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+// PRESERVED/TEMPORARY registers used by handlers in worst case (currently 4).
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+// there must be at least 3 PARAM, and PARAM+TEMPORARY must be at least 4.
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+// SR and R0 should by all means be statically mapped.
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// XXX the static definition of SR MUST match that in compiler.h
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-// VBR, PC, PR must not be static (read from context in utils).
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-// RET_REG/params should be first TEMPs to avoid allocation conflicts in calls.
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-// There MUST be at least 3 params and one non-RET_REG/param TEMP.
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-// XXX shouldn't this be somehow defined in the code emitters?
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+// PC and PR must not be statically mapped (accessed in context by utils).
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+
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#ifdef __arm__
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#include "../drc/emit_arm.c"
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-
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-static guest_reg_t guest_regs[] = {
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- // SHR_R0 .. SHR_SP
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-#ifndef __MACH__ // no r9..
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- { GRF_STATIC, 8 }, { GRF_STATIC, 9 }, { 0 } , { 0 } ,
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-#else
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- { GRF_STATIC, 8 }, { 0 } , { 0 } , { 0 } ,
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-#endif
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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- // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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- { 0 } , { 0 } , { 0 } , { GRF_STATIC, 10 },
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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-};
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-
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-// OABI/EABI: params: r0-r3, return: r0-r1, temp: r12,r14, saved: r4-r8,r10,r11
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-// SP,PC: r13,r15 must not be used. saved: r9 (for platform use, e.g. on ios)
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-static cache_reg_t cache_regs[] = {
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- { 0, HRT_TEMP }, // RET_REG, params
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- { 1, HRT_TEMP },
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- { 2, HRT_TEMP }, // params
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- { 3, HRT_TEMP },
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- { 12, HRT_TEMP }, // temps
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- { 14, HRT_TEMP },
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- { 8, HRT_STATIC }, // statics
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-#ifndef __MACH__ // no r9..
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- { 9, HRT_STATIC },
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-#endif
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- { 10, HRT_STATIC },
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- { 4, HRT_REG }, // other regs
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- { 5, HRT_REG },
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- { 6, HRT_REG },
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- { 7, HRT_REG },
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-};
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-
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#elif defined(__aarch64__)
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#include "../drc/emit_arm64.c"
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-
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-static guest_reg_t guest_regs[] = {
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- // SHR_R0 .. SHR_SP
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- { GRF_STATIC,20 }, { GRF_STATIC,21 }, { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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- // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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- { 0 } , { 0 } , { 0 } , { GRF_STATIC, 22 },
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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-};
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-
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-// AAPCS64: params: r0-r7, return: r0-r1, temp: r8-r17, saved: r19-r29
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-// saved: r18 (for platform use)
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-// since drc never needs more than 4 parameters, r4-r7 are treated as temp.
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-static cache_reg_t cache_regs[] = {
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- { 0, HRT_TEMP }, // RET_REG, params
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- { 1, HRT_TEMP },
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- { 2, HRT_TEMP }, // params
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- { 3, HRT_TEMP },
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- { 4, HRT_TEMP }, // temps
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- { 5, HRT_TEMP },
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- { 6, HRT_TEMP },
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- { 7, HRT_TEMP },
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- { 8, HRT_TEMP },
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- { 9, HRT_TEMP },
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- { 10, HRT_TEMP },
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- { 11, HRT_TEMP },
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- { 12, HRT_TEMP },
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- { 13, HRT_TEMP },
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- { 14, HRT_TEMP },
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- { 15, HRT_TEMP },
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- { 16, HRT_TEMP },
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- { 17, HRT_TEMP },
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- { 20, HRT_STATIC }, // statics
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- { 21, HRT_STATIC },
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- { 22, HRT_STATIC },
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- { 23, HRT_REG }, // other regs
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- { 24, HRT_REG },
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- { 25, HRT_REG },
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- { 26, HRT_REG },
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- { 27, HRT_REG },
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- { 28, HRT_REG },
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- { 29, HRT_REG },
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-};
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-
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#elif defined(__mips__)
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#include "../drc/emit_mips.c"
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-
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-static guest_reg_t guest_regs[] = {
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- // SHR_R0 .. SHR_SP
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- {GRF_STATIC, 16} , {GRF_STATIC, 17} , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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- // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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- { 0 } , { 0 } , { 0 } , {GRF_STATIC, 18} ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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-};
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-
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-// MIPS ABI: params: r4-r7, return: r2-r3, temp: r1(at),r8-r15,r24-r25,r31(ra),
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-// saved: r16-r23,r30, reserved: r0(zero), r26-r27(irq), r28(gp), r29(sp)
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-// r1,r15,r24,r25 are used internally by the code emitter
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-static cache_reg_t cache_regs[] = {
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- { 2, HRT_TEMP }, // RET_REG (v0-v1)
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- { 3, HRT_TEMP },
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- { 4, HRT_TEMP }, // params (a0-a3)
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- { 5, HRT_TEMP },
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- { 6, HRT_TEMP },
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- { 7, HRT_TEMP },
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- { 8, HRT_TEMP }, // temps (t0-t6)
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- { 9, HRT_TEMP },
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- { 10, HRT_TEMP },
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- { 11, HRT_TEMP },
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- { 12, HRT_TEMP },
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- { 13, HRT_TEMP },
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- { 14, HRT_TEMP },
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- { 16, HRT_STATIC }, // statics (s0-s2)
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- { 17, HRT_STATIC },
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- { 18, HRT_STATIC },
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- { 19, HRT_REG }, // other regs (s3-s6)
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- { 20, HRT_REG },
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- { 21, HRT_REG },
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- { 22, HRT_REG },
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-};
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-
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#elif defined(__i386__)
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#include "../drc/emit_x86.c"
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-
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-static guest_reg_t guest_regs[] = {
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- // SHR_R0 .. SHR_SP
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- {GRF_STATIC, xSI}, { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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- // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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- { 0 } , { 0 } , { 0 } , {GRF_STATIC, xDI},
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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-};
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-
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-// MS/SystemV ABI: ebx,esi,edi,ebp are preserved, eax,ecx,edx are temporaries
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-// DRC uses REGPARM to pass upto 3 parameters in registers eax,ecx,edx.
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-// To avoid conflicts with param passing ebx must be declared temp here.
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-static cache_reg_t cache_regs[] = {
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- { xAX, HRT_TEMP }, // RET_REG, param
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- { xDX, HRT_TEMP }, // params
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- { xCX, HRT_TEMP },
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- { xBX, HRT_TEMP }, // temp
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- { xSI, HRT_STATIC }, // statics
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- { xDI, HRT_STATIC },
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-};
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-
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#elif defined(__x86_64__)
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#include "../drc/emit_x86.c"
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-
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-static guest_reg_t guest_regs[] = {
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- // SHR_R0 .. SHR_SP
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- {GRF_STATIC,xR12}, { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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- // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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- // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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- { 0 } , { 0 } , { 0 } , {GRF_STATIC, xBX},
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- { 0 } , { 0 } , { 0 } , { 0 } ,
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-};
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-
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-// M$/SystemV ABI conventions:
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-// rbx,rbp,r12-r15 are preserved, rcx,rdx,rax,r8,r9,r10,r11 are temporaries
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-// rsi,rdi are preserved in M$ ABI, temporary in SystemV ABI
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-// parameters in rcx,rdx,r8,r9, SystemV ABI additionally uses rsi,rdi
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-static cache_reg_t cache_regs[] = {
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- { xAX, HRT_TEMP }, // RET_REG
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- { xDX, HRT_TEMP }, // params
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- { xCX, HRT_TEMP },
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- { xDI, HRT_TEMP },
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- { xSI, HRT_TEMP },
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- { xR8, HRT_TEMP },
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- { xR9, HRT_TEMP },
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- { xR10,HRT_TEMP }, // temps
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- { xR11,HRT_TEMP },
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- { xBX, HRT_STATIC }, // statics
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- { xR12,HRT_STATIC },
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- { xR13,HRT_REG }, // other regs
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- { xR14,HRT_REG },
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- { xR15,HRT_REG },
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-};
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-
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#else
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#error unsupported arch
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#endif
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+static const signed char hregs_param[] = PARAM_REGS;
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+static const signed char hregs_temp [] = TEMPORARY_REGS;
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+static const signed char hregs_saved[] = PRESERVED_REGS;
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+static const signed char regs_static[] = STATIC_SH2_REGS;
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+
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+#define CACHE_REGS \
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+ (ARRAY_SIZE(hregs_param)+ARRAY_SIZE(hregs_temp)+ARRAY_SIZE(hregs_saved)-1)
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+static cache_reg_t cache_regs[CACHE_REGS];
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+
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static signed char reg_map_host[HOST_REGS];
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+static guest_reg_t guest_regs[SH2_REGS];
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+
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static void REGPARM(1) (*sh2_drc_entry)(SH2 *sh2);
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static void REGPARM(1) (*sh2_drc_dispatcher)(u32 pc);
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#if CALL_STACK
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@@ -884,15 +713,15 @@ static void dr_block_link(struct block_entry *be, struct block_link *bl, int emi
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// via blx: @jump near jumpcc to blx; @blx far jump
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emith_jump_patch(jump, bl->blx, &jump);
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emith_jump_at(bl->blx, be->tcache_ptr);
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- if ((((uintptr_t)bl->blx & 0xf) + emith_jump_at_size()-1) > 0xf)
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+ if ((((uintptr_t)bl->blx & 0x1f) + emith_jump_at_size()-1) > 0x1f)
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host_instructions_updated(bl->blx, bl->blx + emith_jump_at_size()-1);
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}
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} else {
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printf("unknown BL type %d\n", bl->type);
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exit(1);
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}
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- // only needs sync if patch is possibly crossing cacheline (assume 16 byte)
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- if ((((uintptr_t)jump & 0xf) + jsz-1) > 0xf)
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+ // only needs sync if patch is possibly crossing cacheline (assume 32 byte)
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+ if ((((uintptr_t)jump & 0x1f) + jsz-1) > 0x1f)
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host_instructions_updated(jump, jump + jsz-1);
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}
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@@ -1653,7 +1482,7 @@ static void gconst_invalidate(void)
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static u16 rcache_counter;
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// SH2 register usage bitmasks
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-static u32 rcache_hregs_reg; // regs of type HRT_REG (for pinning)
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+static u32 rcache_vregs_reg; // regs of type HRT_REG (for pinning)
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static u32 rcache_regs_static; // statically allocated regs
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static u32 rcache_regs_pinned; // pinned regs
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static u32 rcache_regs_now; // regs used in current insn
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@@ -2548,30 +2377,60 @@ static void rcache_flush(void)
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rcache_invalidate();
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}
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-static void rcache_init(void)
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+static void rcache_create(void)
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{
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- static int once = 1;
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- int i;
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+ int x = 0, i;
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+
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+ // create cache_regs as host register representation
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+ // RET_REG/params should be first TEMPs to avoid allocation conflicts in calls
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+ cache_regs[x++] = (cache_reg_t) {.hreg = RET_REG, .htype = HRT_TEMP};
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+ for (i = 0; i < ARRAY_SIZE(hregs_param); i++)
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+ if (hregs_param[i] != RET_REG)
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+ cache_regs[x++] = (cache_reg_t){.hreg = hregs_param[i],.htype = HRT_TEMP};
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+
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+ for (i = 0; i < ARRAY_SIZE(hregs_temp); i++)
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+ if (hregs_temp[i] != RET_REG)
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+ cache_regs[x++] = (cache_reg_t){.hreg = hregs_temp[i], .htype = HRT_TEMP};
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+
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+ for (i = ARRAY_SIZE(hregs_saved)-1; i >= 0; i--)
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+ if (hregs_saved[i] != CONTEXT_REG)
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+ cache_regs[x++] = (cache_reg_t){.hreg = hregs_saved[i], .htype = HRT_REG};
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- // init is executed on every rom load, but this must only be executed once...
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- if (once) {
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- memset(reg_map_host, -1, sizeof(reg_map_host));
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- for (i = 0; i < ARRAY_SIZE(cache_regs); i++) {
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+ if (x != ARRAY_SIZE(cache_regs)) {
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+ printf("rcache_create failed (conflicting register count)\n");
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+ exit(1);
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+ }
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+
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+ // mapping from host_register to cache regs index
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+ memset(reg_map_host, -1, sizeof(reg_map_host));
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+ for (i = 0; i < ARRAY_SIZE(cache_regs); i++) {
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+ if (cache_regs[i].htype)
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reg_map_host[cache_regs[i].hreg] = i;
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- if (cache_regs[i].htype == HRT_REG)
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- rcache_hregs_reg |= (1 << i);
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- }
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+ if (cache_regs[i].htype == HRT_REG)
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+ rcache_vregs_reg |= (1 << i);
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+ }
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- for (i = 0; i < ARRAY_SIZE(guest_regs); i++)
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- if (guest_regs[i].flags & GRF_STATIC) {
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- rcache_regs_static |= (1 << i);
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- guest_regs[i].sreg = reg_map_host[guest_regs[i].sreg];
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- rcache_hregs_reg &= ~(1 << guest_regs[i].sreg);
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- } else
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- guest_regs[i].sreg = -1;
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- once = 0;
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+ // create static host register mapping for SH2 regs
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+ for (i = 0; i < ARRAY_SIZE(regs_static); i += 2) {
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+ for (x = ARRAY_SIZE(cache_regs)-1; x >= 0; x--)
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+ if (cache_regs[x].hreg == regs_static[i+1]) break;
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+ if (x >= 0) {
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+ guest_regs[regs_static[i]] = (guest_reg_t){.flags = GRF_STATIC,.sreg = x};
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+ rcache_regs_static |= (1 << regs_static[i]);
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+ rcache_vregs_reg &= ~(1 << x);
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+ } else
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+ guest_regs[regs_static[i]] = (guest_reg_t){.sreg = -1};
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}
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+ printf("DRC registers created, %ld host regs (%d REG, %d STATIC, 1 CTX)\n",
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+ CACHE_REGS+1L, count_bits(rcache_vregs_reg),count_bits(rcache_regs_static));
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+}
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+
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+static void rcache_init(void)
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+{
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+ // create DRC data structures
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+ rcache_create();
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+
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rcache_invalidate();
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#if DRC_DEBUG & 64
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RCACHE_CHECK("after init");
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@@ -5038,8 +4897,8 @@ static void sh2_generate_utils(void)
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emith_move_r_r_ptr(arg0, CONTEXT_REG);
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emith_call_ctx(offsetof(SH2, irq_callback)); // vector = sh2->irq_callback(sh2, level);
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// obtain new PC
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- emith_ctx_read(arg1, SHR_VBR * 4);
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- emith_add_r_r_r_lsl(arg0, arg1, RET_REG, 2);
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+ tmp = rcache_get_reg_arg(1, SHR_VBR, &tmp2);
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+ emith_add_r_r_r_lsl(arg0, tmp2, RET_REG, 2);
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emith_call(sh2_drc_read32);
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if (arg0 != RET_REG)
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emith_move_r_r(arg0, RET_REG);
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