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@@ -273,9 +273,14 @@ u32 REGPARM(2) sh2_peripheral_read8(u32 a, SH2 *sh2)
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a &= 0x1ff;
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d = PREG8(r, a);
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- sh2->poll_cnt = 0;
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elprintf_sh2(sh2, EL_32XP, "peri r8 [%08x] %02x @%06x",
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a | ~0x1ff, d, sh2_pc(sh2));
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+ if ((a & 0x1c0) == 0x140) {
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+ // abused as comm area
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+ DRC_SAVE_SR(sh2);
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+ p32x_sh2_poll_detect(a, sh2, SH2_STATE_CPOLL, 3);
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+ DRC_RESTORE_SR(sh2);
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+ }
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return d;
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}
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@@ -287,9 +292,14 @@ u32 REGPARM(2) sh2_peripheral_read16(u32 a, SH2 *sh2)
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a &= 0x1fe;
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d = r[(a / 2) ^ 1];
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- sh2->poll_cnt = 0;
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elprintf_sh2(sh2, EL_32XP, "peri r16 [%08x] %04x @%06x",
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a | ~0x1ff, d, sh2_pc(sh2));
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+ if ((a & 0x1c0) == 0x140) {
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+ // abused as comm area
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+ DRC_SAVE_SR(sh2);
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+ p32x_sh2_poll_detect(a, sh2, SH2_STATE_CPOLL, 3);
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+ DRC_RESTORE_SR(sh2);
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+ }
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return d;
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}
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@@ -300,9 +310,14 @@ u32 REGPARM(2) sh2_peripheral_read32(u32 a, SH2 *sh2)
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a &= 0x1fc;
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d = sh2->peri_regs[a / 4];
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- sh2->poll_cnt = 0;
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elprintf_sh2(sh2, EL_32XP, "peri r32 [%08x] %08x @%06x",
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a | ~0x1ff, d, sh2_pc(sh2));
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+ if ((a & 0x1c0) == 0x140) {
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+ // abused as comm area
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+ DRC_SAVE_SR(sh2);
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+ p32x_sh2_poll_detect(a, sh2, SH2_STATE_CPOLL, 3);
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+ DRC_RESTORE_SR(sh2);
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+ }
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return d;
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}
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@@ -378,6 +393,9 @@ void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2)
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break;
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}
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PREG8(r, a) = d;
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+
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+ if ((a & 0x1c0) == 0x140)
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+ p32x_sh2_poll_event(sh2, SH2_STATE_CPOLL, SekCyclesDone());
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}
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void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2)
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@@ -400,6 +418,8 @@ void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2)
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}
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r[(a / 2) ^ 1] = d;
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+ if ((a & 0x1c0) == 0x140)
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+ p32x_sh2_poll_event(sh2, SH2_STATE_CPOLL, SekCyclesDone());
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}
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void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
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@@ -457,14 +477,15 @@ void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
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if (!(dmac->dmaor & DMA_DME))
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return;
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- DRC_SAVE_SR(sh2);
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if ((dmac->chan[0].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(sh2, &dmac->chan[0]);
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if ((dmac->chan[1].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(sh2, &dmac->chan[1]);
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- DRC_RESTORE_SR(sh2);
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break;
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}
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+
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+ if ((a & 0x1c0) == 0x140)
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+ p32x_sh2_poll_event(sh2, SH2_STATE_CPOLL, SekCyclesDone());
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}
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/* 32X specific */
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