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@@ -94,36 +94,36 @@
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#define IN(A) CPU->IN_Port(A)
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#define OUT(A, D) CPU->OUT_Port(A, D)
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-#define CHECK_INT \
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- if (zIFF1) \
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- { \
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- UINT32 IntVect; \
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- \
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- if (CPU->IRQState == HOLD_LINE) \
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- CPU->IRQState = CLEAR_LINE; \
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- \
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- CPU->HaltState = 0; \
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- zIFF1 = zIFF2 = 0; \
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- IntVect = CPU->Interrupt_Callback(CPU->IRQLine); \
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- \
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- PUSH_16(zRealPC) \
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- \
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- if (zIM == 2) \
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- { \
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- IntVect = (IntVect & 0xff) | (zI << 8); \
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- PC = READ_MEM16(IntVect); \
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- CPU->ExtraCycles += 17; \
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- } \
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- else if (zIM == 1) \
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- { \
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- PC = 0x38; \
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- CPU->ExtraCycles += 13; \
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- } \
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- else \
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- { \
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- PC = IntVect & 0x38; \
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- CPU->ExtraCycles += 13; \
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- } \
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- \
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- SET_PC(PC) \
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+#define CHECK_INT \
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+ if (zIFF1) \
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+ { \
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+ UINT32 IntVect; \
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+ \
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+ if (CPU->IRQState == HOLD_LINE) \
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+ CPU->IRQState = CLEAR_LINE; \
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+ \
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+ CPU->HaltState = 0; \
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+ zIFF1 = zIFF2 = 0; \
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+ IntVect = CPU->Interrupt_Callback(CPU->IRQLine); \
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+ \
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+ PUSH_16(zRealPC) \
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+ \
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+ if (zIM == 2) \
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+ { \
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+ IntVect = (IntVect & 0xff) | (zI << 8); \
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+ PC = READ_MEM16(IntVect); \
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+ CPU->ExtraCycles += 17; \
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+ } \
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+ else if (zIM == 1) \
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+ { \
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+ PC = 0x38; \
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+ CPU->ExtraCycles += 13; \
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+ } \
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+ else \
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+ { \
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+ PC = IntVect & 0x38; \
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+ CPU->ExtraCycles += 13; \
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+ } \
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+ \
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+ SET_PC(PC) \
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}
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