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@@ -480,10 +480,12 @@ void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
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if (!(dmac->dmaor & DMA_DME))
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return;
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+ DRC_SAVE_SR(sh2);
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if ((dmac->chan[0].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(sh2, &dmac->chan[0]);
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if ((dmac->chan[1].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(sh2, &dmac->chan[1]);
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+ DRC_RESTORE_SR(sh2);
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break;
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}
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@@ -538,7 +540,9 @@ static void dreq1_do(SH2 *sh2, struct dma_chan *chan)
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if ((chan->dar & ~0xf) != 0x20004030)
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elprintf(EL_32XP|EL_ANOMALY, "dreq1: bad dar?: %08x\n", chan->dar);
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+ sh2->state |= SH2_STATE_SLEEP;
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dmac_transfer_one(sh2, chan);
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+ sh2->state &= ~SH2_STATE_SLEEP;
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if (chan->tcr == 0)
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dmac_transfer_complete(sh2, chan);
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}
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