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Added last irixxxx's changes

root преди 3 години
родител
ревизия
17ffa908b8
променени са 7 файла, в които са добавени 26 реда и са изтрити 25 реда
  1. 1 1
      .gitmodules
  2. 1 5
      cpu/fame/famec_opcodes.h
  3. 7 6
      cpu/sh2/compiler.c
  4. 7 5
      cpu/sh2/mame/sh2pico.c
  5. 5 5
      pico/32x/memory.c
  6. 1 1
      pico/cd/mcd.c
  7. 4 2
      pico/cd/memory.c

+ 1 - 1
.gitmodules

@@ -3,7 +3,7 @@
 	url = https://github.com/FunKey-Project/picofe-irixxxx.git
 [submodule "cpu/cyclone"]
 	path = cpu/cyclone
-	url = https://github.com/notaz/cyclone68000.git
+	url = https://github.com/irixxxx/cyclone68000.git
 [submodule "pico/sound/emu2413"]
 	path = pico/sound/emu2413
 	url = https://github.com/digital-sound-antiques/emu2413.git

+ 1 - 5
cpu/fame/famec_opcodes.h

@@ -4614,7 +4614,7 @@ OPCODE(0x013C)
 	src = 1 << (src & 7);
 	FETCH_BYTE(res);
 	flag_NotZ = res & src;
-RET(8)
+RET(10)
 }
 
 // BTST
@@ -24027,11 +24027,7 @@ OPCODE(0x5048)
 	dst = AREGu32((Opcode >> 0) & 7);
 	res = dst + src;
 	AREG((Opcode >> 0) & 7) = res;
-#ifdef USE_CYCLONE_TIMING
-RET(4)
-#else
 RET(8)
-#endif
 }
 
 // ADDQ

+ 7 - 6
cpu/sh2/compiler.c

@@ -3540,7 +3540,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
         // if exiting a pinned loop pinned regs must be written back to ctx
         // since they are reloaded in the loop entry code
         emith_cmp_r_imm(sr, 0);
-        EMITH_JMP_START(DCOND_GT);
+        EMITH_JMP_START(DCOND_GE);
         rcache_save_pinned();
 
         if (blx_target_count < ARRAY_SIZE(blx_targets)) {
@@ -3564,13 +3564,13 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
           emith_cmp_r_imm(sr, 0);
           blx_targets[blx_target_count++] =
               (struct linkage) { .pc = pc, .ptr = tcache_ptr, .mask = 0x1 };
-          emith_jump_cond_patchable(DCOND_LE, tcache_ptr);
+          emith_jump_cond_patchable(DCOND_LT, tcache_ptr);
         } else {
           // blx table full, must inline exit code
           tmp = rcache_get_tmp_arg(0);
           emith_cmp_r_imm(sr, 0);
           EMITH_SJMP_START(DCOND_GT);
-          emith_move_r_imm_c(DCOND_LE, tmp, pc);
+          emith_move_r_imm_c(DCOND_LT, tmp, pc);
           emith_jump_cond(DCOND_LE, sh2_drc_exit);
           EMITH_SJMP_END(DCOND_GT);
           rcache_free_tmp(tmp);
@@ -5676,7 +5676,7 @@ int sh2_execute_drc(SH2 *sh2c, int cycles)
   // bit11 contains T saved for delay slot
   // others are usual SH2 flags
   sh2c->sr &= 0x3f3;
-  sh2c->sr |= cycles << 12;
+  sh2c->sr |= (cycles-1) << 12;
 #if (DRC_DEBUG & 8)
   lastpc = lastcnt = 0;
 #endif
@@ -5687,7 +5687,7 @@ int sh2_execute_drc(SH2 *sh2c, int cycles)
 
   // TODO: irq cycles
   ret_cycles = (int32_t)sh2c->sr >> 12;
-  if (ret_cycles > 0)
+  if (ret_cycles >= 0)
     dbg(1, "warning: drc returned with cycles: %d, pc %08x", ret_cycles, sh2c->pc);
 #if (DRC_DEBUG & 8)
   if (lastcnt)
@@ -5696,7 +5696,7 @@ int sh2_execute_drc(SH2 *sh2c, int cycles)
 #endif
 
   sh2c->sr &= 0x3f3;
-  return ret_cycles;
+  return ret_cycles+1;
 }
 
 static void block_stats(void)
@@ -6223,6 +6223,7 @@ u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
           break;
         case 1: // SLEEP      0000000000011011
           opd->op = OP_SLEEP;
+          opd->cycles = 3;
           end_block = 1;
           break;
         case 2: // RTE        0000000000101011

+ 7 - 5
cpu/sh2/mame/sh2pico.c

@@ -167,14 +167,16 @@ int sh2_execute_interpreter(SH2 *sh2, int cycles)
 
 		sh2->icount--;
 
-		if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
+		if (sh2->test_irq && !sh2->delay)
 		{
 			int level = sh2->pending_level;
-			int vector = sh2->irq_callback(sh2, level);
-			sh2_do_irq(sh2, level, vector);
+			if (level > ((sh2->sr >> 4) & 0x0f))
+			{
+				int vector = sh2->irq_callback(sh2, level);
+				sh2_do_irq(sh2, level, vector);
+			}
 			sh2->test_irq = 0;
 		}
-
 	}
 	while (sh2->icount > 0 || sh2->delay);	/* can't interrupt before delay */
 
@@ -221,7 +223,7 @@ int sh2_execute_interpreter(SH2 *sh2, int cycles)
 				|| pc_expect != sh2->pc) // branched
 			{
 				pc_expect = sh2->pc;
-				if (sh2->icount < 0)
+				if (sh2->icount <= 0)
 					break;
 			}
 

+ 5 - 5
pico/32x/memory.c

@@ -511,7 +511,7 @@ static void p32x_reg_write8(u32 a, u32 d)
     case 0x2d:
     case 0x2e:
     case 0x2f:
-      if (REG8IN16(r, a) != d) {
+      if (REG8IN16(r, a) != (u8)d) {
         unsigned int cycles = SekCyclesDone();
 
         if (CYCLES_GT(cycles - msh2.m68krcycles_done, 64))
@@ -608,7 +608,7 @@ static void p32x_reg_write16(u32 a, u32 d)
     case 0x2a/2:
     case 0x2c/2:
     case 0x2e/2:
-      if (r[a / 2] != d) {
+      if (r[a / 2] != (u16)d) {
         unsigned int cycles = SekCyclesDone();
 
         if (CYCLES_GT(cycles - msh2.m68krcycles_done, 64))
@@ -823,7 +823,7 @@ static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
       return;
     case 0x05: // H count
       d &= 0xff;
-      if (Pico32x.sh2_regs[4 / 2] != d) {
+      if (Pico32x.sh2_regs[4 / 2] != (u8)d) {
         unsigned int cycles = sh2_cycles_done_m68k(sh2);
         Pico32x.sh2_regs[4 / 2] = d;
         p32x_sh2_poll_event(sh2->other_sh2, SH2_STATE_CPOLL, cycles);
@@ -848,7 +848,7 @@ static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
     case 0x2d:
     case 0x2e:
     case 0x2f:
-      if (REG8IN16(r, a) != d) {
+      if (REG8IN16(r, a) != (u8)d) {
         unsigned int cycles = sh2_cycles_done_m68k(sh2);
 
         REG8IN16(r, a) = d;
@@ -941,7 +941,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, SH2 *sh2)
     case 0x2a/2:
     case 0x2c/2:
     case 0x2e/2:
-      if (Pico32x.regs[a / 2] != d) {
+      if (Pico32x.regs[a / 2] != (u16)d) {
         unsigned int cycles = sh2_cycles_done_m68k(sh2);
 
         Pico32x.regs[a / 2] = d;

+ 1 - 1
pico/cd/mcd.c

@@ -342,7 +342,7 @@ void pcd_run_cpus_normal(int m68k_cycles)
       Pico_mcd->m.m68k_poll_cnt = 0;
 
 #ifdef USE_POLL_DETECT
-    if (Pico_mcd->m.m68k_poll_cnt >= 32) {
+    if (Pico_mcd->m.m68k_poll_cnt >= 16) {
       int s68k_left;
       // main CPU is polling, (wake and) run sub only
       if (SekIsStoppedS68k())

+ 4 - 2
pico/cd/memory.c

@@ -63,7 +63,7 @@ static void remap_prg_window(u32 r1, u32 r3);
 static void remap_word_ram(u32 r3);
 
 // poller detection
-#define POLL_LIMIT 32
+#define POLL_LIMIT 16
 #define POLL_CYCLES 64
 
 void m68k_comm_check(u32 a)
@@ -78,13 +78,15 @@ void m68k_comm_check(u32 a)
     Pico_mcd->m.need_sync = 1;
   }
   Pico_mcd->m.m68k_poll_clk = cycles;
-  if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES) {
+  if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES || clkdiff <= 16) {
     Pico_mcd->m.m68k_poll_a = a;
     Pico_mcd->m.m68k_poll_cnt = 0;
     SekNotPolling = 0;
     return;
   }
   Pico_mcd->m.m68k_poll_cnt++;
+  if(Pico_mcd->m.m68k_poll_cnt == POLL_LIMIT)
+    SekEndRun(0);
 }
 
 #ifndef _ASM_CD_MEMORY_C