kernel_004_drmsun4i.patch 3.3 KB

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  1. diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
  2. index 5e751b80e..92d4cd3dc 100644
  3. --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
  4. +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
  5. @@ -338,12 +338,12 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
  6. * The whole dithering process and these parameters are not
  7. * explained in the vendor documents or BSP kernel code.
  8. */
  9. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PR_REG, 0x11111111);
  10. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PG_REG, 0x11111111);
  11. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PB_REG, 0x11111111);
  12. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LR_REG, 0x11111111);
  13. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LG_REG, 0x11111111);
  14. - regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LB_REG, 0x11111111);
  15. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PR_REG, 1);
  16. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PG_REG, 3);
  17. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_PB_REG, 5);
  18. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LR_REG, 7);
  19. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LG_REG, 11);
  20. + regmap_write(tcon->regs, SUN4I_TCON0_FRM_SEED_LB_REG, 13);
  21. regmap_write(tcon->regs, SUN4I_TCON0_FRM_TBL0_REG, 0x01010000);
  22. regmap_write(tcon->regs, SUN4I_TCON0_FRM_TBL1_REG, 0x15151111);
  23. regmap_write(tcon->regs, SUN4I_TCON0_FRM_TBL2_REG, 0x57575555);
  24. @@ -1602,6 +1602,12 @@ static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = {
  25. .set_mux = sun8i_r40_tcon_tv_set_mux,
  26. };
  27. +static const struct sun4i_tcon_quirks sun50i_h6_lcd_quirks = {
  28. + .has_channel_0 = true,
  29. + .dclk_min_div = 1,
  30. + .set_mux = sun8i_r40_tcon_tv_set_mux,
  31. +};
  32. +
  33. static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
  34. .has_channel_0 = true,
  35. .dclk_min_div = 1,
  36. @@ -1632,6 +1638,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
  37. { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks },
  38. { .compatible = "allwinner,sun8i-a83t-tcon-tv", .data = &sun8i_a83t_tv_quirks },
  39. { .compatible = "allwinner,sun8i-r40-tcon-tv", .data = &sun8i_r40_tv_quirks },
  40. + { .compatible = "allwinner,sun50i-h6-tcon-lcd", .data = &sun50i_h6_lcd_quirks },
  41. { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
  42. { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks },
  43. { .compatible = "allwinner,sun9i-a80-tcon-tv", .data = &sun9i_a80_tcon_tv_quirks },
  44. diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
  45. index 4fe915262..cd667fef8 100644
  46. --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
  47. +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
  48. @@ -683,6 +683,16 @@ static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = {
  49. .vi_num = 1,
  50. };
  51. +static const struct sun8i_mixer_cfg sun50i_h6_mixer1_cfg = {
  52. + .ccsc = 0,
  53. + .is_de3 = true,
  54. + .mod_rate = 600000000,
  55. + .scaler_mask = 0xf,
  56. + .scanline_yuv = 4096,
  57. + .ui_num = 1,
  58. + .vi_num = 1,
  59. +};
  60. +
  61. static const struct of_device_id sun8i_mixer_of_table[] = {
  62. {
  63. .compatible = "allwinner,sun8i-a83t-de2-mixer-0",
  64. @@ -724,6 +734,10 @@ static const struct of_device_id sun8i_mixer_of_table[] = {
  65. .compatible = "allwinner,sun50i-h6-de3-mixer-0",
  66. .data = &sun50i_h6_mixer0_cfg,
  67. },
  68. + {
  69. + .compatible = "allwinner,sun50i-h6-de3-mixer-1",
  70. + .data = &sun50i_h6_mixer1_cfg,
  71. + },
  72. { }
  73. };
  74. MODULE_DEVICE_TABLE(of, sun8i_mixer_of_table);