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add devterm d1 patch files

cuu 2 years ago
parent
commit
2edd669d2d

+ 313 - 0
Code/patch/d1/bl.patch

@@ -0,0 +1,313 @@
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 40676be2e..2ead0db48 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -456,6 +456,13 @@ config BACKLIGHT_RAVE_SP
+ 	help
+ 	  Support for backlight control on RAVE SP device.
+ 
++
++config BACKLIGHT_OCP8178
++	tristate "OCP8178 Backlight Driver"
++	depends on GPIOLIB
++	help
++	  If you have an OCP8178, say Y to enable the backlight driver.
++
+ endif # BACKLIGHT_CLASS_DEVICE
+ 
+ endmenu
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index 63c507c07..1ffc64eff 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -57,3 +57,4 @@ obj-$(CONFIG_BACKLIGHT_TPS65217)	+= tps65217_bl.o
+ obj-$(CONFIG_BACKLIGHT_WM831X)		+= wm831x_bl.o
+ obj-$(CONFIG_BACKLIGHT_ARCXCNN) 	+= arcxcnn_bl.o
+ obj-$(CONFIG_BACKLIGHT_RAVE_SP)		+= rave-sp-backlight.o
++obj-$(CONFIG_BACKLIGHT_OCP8178)		+= ocp8178_bl.o
+diff --git a/drivers/video/backlight/ocp8178_bl.c b/drivers/video/backlight/ocp8178_bl.c
+new file mode 100644
+index 000000000..01b4a36c6
+--- /dev/null
++++ b/drivers/video/backlight/ocp8178_bl.c
+@@ -0,0 +1,280 @@
++/*
++ * ocp8178_bl.c - ocp8178 backlight driver
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/backlight.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/gpio.h> /* Only for legacy support */
++#include <linux/gpio/consumer.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/platform_data/gpio_backlight.h>
++#include <linux/platform_device.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++#include <linux/poll.h>
++#include <linux/proc_fs.h>
++#include <linux/seq_file.h>
++#include <linux/sched.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/io.h>
++#include <linux/clk.h>
++
++struct ocp8178_backlight {
++	struct device *dev;
++	struct device *fbdev;
++
++	struct gpio_desc *gpiod;
++	int def_value;
++	int current_value;
++};
++
++#define DETECT_DELAY 200
++#define DETECT_TIME 500
++#define DETECT_WINDOW_TIME 1000
++#define START_TIME 10
++#define END_TIME 10
++#define SHUTDOWN_TIME 3000
++#define LOW_BIT_HIGH_TIME 10
++#define LOW_BIT_LOW_TIME 50
++#define HIGH_BIT_HIGH_TIME 50
++#define HIGH_BIT_LOW_TIME 10
++#define MAX_BRIGHTNESS_VALUE 9
++
++static void entry_1wire_mode(struct ocp8178_backlight *gbl)
++{
++	unsigned long flags = 0;
++	local_irq_save(flags);
++	gpiod_set_value(gbl->gpiod, 0);
++	mdelay(SHUTDOWN_TIME/1000);
++	gpiod_set_value(gbl->gpiod, 1);
++	udelay(DETECT_DELAY);
++	gpiod_set_value(gbl->gpiod, 0);
++	udelay(DETECT_TIME);
++	gpiod_set_value(gbl->gpiod, 1);
++	udelay(DETECT_WINDOW_TIME);
++	local_irq_restore(flags);
++}
++
++static inline void write_bit(struct ocp8178_backlight *gbl, int bit)
++{
++	if (bit) {
++		gpiod_set_value(gbl->gpiod, 0);
++		udelay(HIGH_BIT_LOW_TIME);
++		gpiod_set_value(gbl->gpiod, 1);
++		udelay(HIGH_BIT_HIGH_TIME);
++	} else {
++		gpiod_set_value(gbl->gpiod, 0);
++		udelay(LOW_BIT_LOW_TIME);
++		gpiod_set_value(gbl->gpiod, 1);
++		udelay(LOW_BIT_HIGH_TIME);
++	}
++}
++
++static void write_byte(struct ocp8178_backlight *gbl, int byte)
++{
++	unsigned long flags = 0;
++	unsigned char data = 0x72;
++	int i;
++
++	local_irq_save(flags);
++
++	gpiod_set_value(gbl->gpiod, 1);
++	udelay(START_TIME);
++	for(i = 0; i < 8; i++) {
++		if(data & 0x80) {
++			write_bit(gbl, 1);
++		} else {
++			write_bit(gbl, 0);
++		}
++		data <<= 1;
++	}
++	gpiod_set_value(gbl->gpiod, 0);
++	udelay(END_TIME);
++
++	data = byte & 0x1f;
++
++	gpiod_set_value(gbl->gpiod, 1);
++	udelay(START_TIME);
++	for(i = 0; i < 8; i++) {
++		if(data & 0x80) {
++			write_bit(gbl, 1);
++		} else {
++			write_bit(gbl, 0);
++		}
++		data <<= 1;
++	}
++	gpiod_set_value(gbl->gpiod, 0);
++	udelay(END_TIME);
++	gpiod_set_value(gbl->gpiod, 1);
++
++	local_irq_restore(flags);
++}
++
++unsigned char ocp8178_bl_table[MAX_BRIGHTNESS_VALUE+1] = {0, 1, 4, 8, 12, 16, 20, 24, 28, 31};
++
++static int ocp8178_update_status(struct backlight_device *bl)
++{
++	struct ocp8178_backlight *gbl = bl_get_data(bl);
++	int brightness = bl->props.brightness, i;
++
++	if (bl->props.power != FB_BLANK_UNBLANK ||
++	    bl->props.fb_blank != FB_BLANK_UNBLANK ||
++	    bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
++		brightness = 0;
++
++	if(brightness > MAX_BRIGHTNESS_VALUE)
++		brightness = MAX_BRIGHTNESS_VALUE;
++
++	for(i = 0; i < 2; i++) {
++		entry_1wire_mode(gbl);
++		write_byte(gbl, ocp8178_bl_table[brightness]);
++	}
++
++	gbl->current_value = brightness;
++
++	return 0;
++}
++
++static int ocp8178_get_brightness(struct backlight_device *bl)
++{
++	struct ocp8178_backlight *gbl = bl_get_data(bl);
++	return gbl->current_value;
++}
++
++static int ocp8178_check_fb(struct backlight_device *bl,
++				   struct fb_info *info)
++{
++	struct ocp8178_backlight *gbl = bl_get_data(bl);
++	return gbl->fbdev == NULL || gbl->fbdev == info->dev;
++}
++
++static const struct backlight_ops ocp8178_backlight_ops = {
++	.options	= BL_CORE_SUSPENDRESUME,
++	.update_status	= ocp8178_update_status,
++	.get_brightness = ocp8178_get_brightness,
++	.check_fb	= ocp8178_check_fb,
++};
++
++static int ocp8178_probe_dt(struct platform_device *pdev,
++				   struct ocp8178_backlight *gbl)
++{
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	enum gpiod_flags flags;
++	int ret = 0;
++	u32 value32;
++
++	of_property_read_u32(np, "default-brightness", &value32);
++	if(value32 > MAX_BRIGHTNESS_VALUE)
++		gbl->def_value = MAX_BRIGHTNESS_VALUE;
++	else
++		gbl->def_value = value32;
++	flags = gbl->def_value ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
++
++	gbl->gpiod = devm_gpiod_get(dev, "backlight-control", flags);
++
++	if (IS_ERR(gbl->gpiod)) {
++		ret = PTR_ERR(gbl->gpiod);
++
++		if (ret != -EPROBE_DEFER) {
++			dev_err(dev,
++				"Error: The gpios parameter is missing or invalid.\n");
++		}
++	}
++
++	return ret;
++}
++
++static struct backlight_device *backlight;
++
++static int ocp8178_probe(struct platform_device *pdev)
++{
++	struct backlight_properties props;
++	struct backlight_device *bl;
++	struct ocp8178_backlight *gbl;
++	struct device_node *np = pdev->dev.of_node;
++	int ret;
++
++	if ( !np) {
++		dev_err(&pdev->dev,
++			"failed to find platform data or device tree node.\n");
++		return -ENODEV;
++	}
++
++	gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL);
++	if (gbl == NULL)
++		return -ENOMEM;
++
++	gbl->dev = &pdev->dev;
++
++	ret = ocp8178_probe_dt(pdev, gbl);
++	if (ret)
++		return ret;
++
++	gbl->current_value = gbl->def_value;
++
++	memset(&props, 0, sizeof(props));
++	props.type = BACKLIGHT_RAW;
++	props.max_brightness = MAX_BRIGHTNESS_VALUE;
++	bl = devm_backlight_device_register(&pdev->dev, dev_name(&pdev->dev),
++					&pdev->dev, gbl, &ocp8178_backlight_ops,
++					&props);
++	if (IS_ERR(bl)) {
++		dev_err(&pdev->dev, "failed to register backlight\n");
++		return PTR_ERR(bl);
++	}
++
++//	entry_1wire_mode(gbl);
++
++	bl->props.brightness = gbl->def_value;
++	backlight_update_status(bl);
++
++	platform_set_drvdata(pdev, bl);
++
++	backlight = bl;
++
++	return 0;
++}
++
++static int ocp8178_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	return 0;
++}
++
++static int ocp8178_resume(struct platform_device *pdev)
++{
++	return 0;
++}
++
++static struct of_device_id ocp8178_of_match[] = {
++	{ .compatible = "ocp8178-backlight" },
++	{ /* sentinel */ }
++};
++
++MODULE_DEVICE_TABLE(of, ocp8178_of_match);
++
++static struct platform_driver ocp8178_driver = {
++	.driver		= {
++		.name		= "ocp8178-backlight",
++		.of_match_table = of_match_ptr(ocp8178_of_match),
++	},
++	.probe		= ocp8178_probe,
++	.suspend		= ocp8178_suspend,
++	.resume		= ocp8178_resume,
++};
++
++module_platform_driver(ocp8178_driver);
++
++MODULE_DESCRIPTION("OCP8178 Driver");
++MODULE_LICENSE("GPL");

+ 1488 - 0
Code/patch/d1/board.dts

@@ -0,0 +1,1488 @@
+/*
+ * Allwinner Technology CO., Ltd. sun20iw1p1 fpga.
+ *
+ * fpga support.
+ */
+
+/dts-v1/;
+
+#include "sun20iw1p1.dtsi"
+
+/{
+	compatible = "allwinner,d1", "arm,sun20iw1p1", "allwinner,sun20iw1p1";
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x0 0x40000000 0x0 0x40000000>; /* 1 GB */
+	};
+
+	aliases {
+		dsp0 = &dsp0;
+		dsp0_gpio_int= &dsp0_gpio_int;
+	};
+
+	dsp0: dsp0 {
+		compatible = "allwinner,sun20iw1-dsp";
+		status = "okay";
+	};
+
+	dsp0_gpio_int: dsp0_gpio_int {
+		compatible = "allwinner,sun20iw1-dsp-gpio-int";
+		pin-group = "PB", "PC", "PD", "PE";
+		status = "disabled";
+	};
+
+	reg_vdd_cpu: vdd-cpu {
+		compatible = "sunxi-pwm-regulator";
+		pwms = <&pwm 0 5000 0>;
+		regulator-name = "vdd_cpu";
+		regulator-min-microvolt = <810000>;
+		regulator-max-microvolt = <1160000>;
+		regulator-ramp-delay = <25>;
+		regulator-always-on;
+		regulator-boot-on;
+		status = "okay";
+	};
+
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-enable-ramp-delay = <1000>;
+		/*gpio = <&pio PD 19 GPIO_ACTIVE_HIGH>;*/
+		enable-active-high;
+	};
+
+	ocp8178_backlight: backlight@0 {
+			compatible = "ocp8178-backlight";
+			backlight-control-gpios = <&pio PD 20  GPIO_ACTIVE_HIGH>;
+			default-brightness = <5>;
+//			pinctrl-names = "default";
+//			pinctrl-0 = <&backlight_control>;
+	};
+};
+
+&CPU0 {
+	cpu-supply = <&reg_vdd_cpu>;
+};
+
+&pio {
+	sdc0_pins_a: sdc0@0 {
+		allwinner,pins = "PF0", "PF1", "PF2",
+				 "PF3", "PF4", "PF5";
+		allwinner,function = "sdc0";
+		allwinner,muxsel = <2>;
+		allwinner,drive = <3>;
+		allwinner,pull = <1>;
+		pins = "PF0", "PF1", "PF2",
+		       "PF3", "PF4", "PF5";
+		function = "sdc0";
+		drive-strength = <30>;
+		bias-pull-up;
+		power-source = <3300>;
+	};
+
+
+	sdc0_pins_b: sdc0@1 {
+		pins = "PF0", "PF1", "PF2",
+		       "PF3", "PF4", "PF5";
+		function = "sdc0";
+		drive-strength = <30>;
+		bias-pull-up;
+		power-source = <1800>;
+	};
+
+	sdc0_pins_c: sdc0@2 {
+		pins = "PF0", "PF1", "PF2",
+			"PF3", "PF4", "PF5";
+		function = "gpio_in";
+	};
+
+	/* TODO: add jtag pin */
+	sdc0_pins_d: sdc0@3 {
+		pins = "PF2", "PF4";
+		function = "uart0";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	sdc0_pins_e: sdc0@4 {
+		pins = "PF0", "PF1", "PF3",
+			"PF5";
+		function = "jtag";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+
+	sdc1_pins_a: sdc1@0 {
+		pins = "PG0", "PG1", "PG2",
+		       "PG3", "PG4", "PG5";
+		function = "sdc1";
+		drive-strength = <30>;
+		bias-pull-up;
+	};
+
+	sdc1_pins_b: sdc1@1 {
+		pins = "PG0", "PG1", "PG2",
+		       "PG3", "PG4", "PG5";
+			function = "gpio_in";
+	};
+
+	sdc2_pins_a: sdc2@0 {
+		allwinner,pins = "PC2", "PC3", "PC4",
+				 "PC5", "PC6", "PC7";
+		allwinner,function = "sdc2";
+		allwinner,muxsel = <3>;
+		allwinner,drive = <3>;
+		allwinner,pull = <1>;
+		pins = "PC2", "PC3", "PC4",
+			"PC5", "PC6", "PC7";
+		function = "sdc2";
+		drive-strength = <30>;
+		bias-pull-up;
+	};
+
+	sdc2_pins_b: sdc2@1 {
+		pins = "PC2", "PC3", "PC4",
+		       "PC5", "PC6", "PC7";
+		function = "gpio_in";
+	};
+	/*
+	wlan_pins_a:wlan@0 {
+		pins = "PG11";
+		function = "clk_fanout1";
+	};*/
+
+	uart0_pins_a: uart0_pins@0 {  /* For nezha board */
+		pins = "PB8", "PB9";
+		function = "uart0";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	uart0_pins_b: uart0_pins@1 {  /* For nezha board */
+		pins = "PB8", "PB9";
+		function = "gpio_in";
+	};
+
+	uart1_pins_a: uart1_pins@0 {  /* For EVB1 board */
+		pins = "PG6", "PG7", "PG8", "PG9";
+		function = "uart1";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	uart1_pins_b: uart1_pins {  /* For EVB1 board */
+		pins = "PG6", "PG7", "PG8", "PG9";
+		function = "gpio_in";
+	};
+
+	uart2_pins_a: uart2_pins@0 {  /* For EVB1 board */
+		pins = "PC0", "PC1";
+		function = "uart2";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	uart2_pins_b: uart2_pins@1 {  /* For EVB1 board */
+		pins = "PC0", "PC1";
+		function = "gpio_in";
+	};
+
+	uart3_pins_a: uart3_pins@0 {  /* For EVB1 board */
+		pins = "PD10", "PD11";
+		function = "uart3";
+		muxsel = <5>;
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	twi0_pins_a: twi0@0 {
+		pins = "PB10", "PB11";	/*sck sda*/
+		function = "twi0";
+		drive-strength = <10>;
+	};
+
+	twi0_pins_b: twi0@1 {
+		pins = "PB10", "PB11";
+		function = "gpio_in";
+	};
+
+	twi1_pins_a: twi1@0 {
+		pins = "PB4", "PB5";
+		function = "twi1";
+		drive-strength = <10>;
+	};
+
+	twi1_pins_b: twi1@1 {
+		pins = "PB4", "PB5";
+		function = "gpio_in";
+	};
+
+	twi2_pins_a: twi2@0 {
+		pins = "PB0", "PB1";
+		function = "twi2";
+		drive-strength = <10>;
+	};
+
+	twi2_pins_b: twi2@1 {
+		pins = "PB0", "PB1";
+		function = "gpio_in";
+	};
+
+	twi3_pins_a: twi3@0 {
+		pins = "PB6", "PB7";
+		function = "twi3";
+		drive-strength = <10>;
+	};
+
+	twi3_pins_b: twi3@1 {
+		pins = "PB6", "PB7";
+		function = "gpio_in";
+	};
+
+	gmac_pins_a: gmac@0 {
+		pins = "PE0", "PE1", "PE2", "PE3",
+		       "PE4", "PE5", "PE6", "PE7",
+		       "PE8", "PE9", "PE10", "PE11",
+		       "PE12", "PE13", "PE14", "PE15";
+		function = "gmac0";
+		drive-strength = <10>;
+	};
+
+	gmac_pins_b: gmac@1 {
+		pins = "PE0", "PE1", "PE2", "PE3",
+		       "PE4", "PE5", "PE6", "PE7",
+		       "PE8", "PE9", "PE10", "PE11",
+		       "PE12", "PE13", "PE14", "PE15";
+		function = "gpio_in";
+	};
+
+	dmic_pins_a: dmic@0 {
+		/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
+		pins = "PE17", "PB11", "PB10", "PD17";
+		function = "dmic";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	dmic_pins_b: dmic@1 {
+		pins = "PE17", "PB11", "PB10", "PD17";
+		function = "io_disabled";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio0_pins_a: daudio0@0 {
+		pins = "PE17", "PE16", "PE15", "PE14", "PE13";
+		function = "i2s0";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio0_pins_b: daudio0_sleep@0 {
+		pins = "PE17", "PE16", "PE15", "PE14", "PE13";
+		function = "io_disabled";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio1_pins_a: daudio1@0 {
+		pins = "PG11", "PG12", "PG13", "PG14", "PG15";
+		function = "i2s1";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio1_pins_b: daudio1_sleep@0 {
+		pins = "PG11", "PG12", "PG13", "PG14", "PG15";
+		function = "io_disabled";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio2_pins_a: daudio2@0 {
+		/* I2S_PIN: MCLK, BCLK, LRCK */
+		pins = "PB7", "PB5", "PB6";
+		function = "i2s2";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio2_pins_b: daudio2@1 {
+		/* I2S_PIN: DOUT0 */
+		pins = "PB4";
+		function = "i2s2_dout";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio2_pins_c: daudio2@2 {
+		/* I2S_PIN: DIN0 */
+		pins = "PB3";
+		function = "i2s2_din";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	daudio2_pins_d: daudio2_sleep@0 {
+		pins = "PB7", "PB5", "PB6", "PB4", "PB3";
+		function = "io_disabled";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	spdif_pins_a: spdif@0 {
+		/* SPDIF_PIN: SPDIF_OUT */
+		pins = "PB0";
+		function = "spdif";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	spdif_pins_b: spdif_sleep@0 {
+		pins = "PB0";
+		function = "io_disabled";
+		drive-strength = <20>;
+		bias-disable;
+	};
+
+	spi0_pins_a: spi0@0 {
+		pins = "PC2", "PC4", "PC5","PC7", "PC6"; /*clk mosi miso hold wp*/
+		function = "spi0";
+		muxsel = <2>;
+		drive-strength = <10>;
+	};
+
+	spi0_pins_b: spi0@1 {
+		pins = "PC3", "PC7", "PC6";
+		function = "spi0";
+		muxsel = <2>;
+		drive-strength = <10>;
+		bias-pull-up;   /* only CS should be pulled up */
+	};
+
+	spi0_pins_c: spi0@2 {
+		pins = "PC2", "PC3", "PC4", "PC5","PC6", "PC7";
+		function = "gpio_in";
+		muxsel = <0>;
+		drive-strength = <10>;
+	};
+
+	spi1_pins_a: spi1@0 {
+		pins = "PD11", "PD12", "PD13","PD14", "PD15"; /*clk mosi miso hold wp*/
+		function = "spi1";
+		drive-strength = <10>;
+	};
+
+	spi1_pins_b: spi1@1 {
+		pins = "PD10";
+		function = "spi1";
+		drive-strength = <10>;
+		bias-pull-up;   // only CS should be pulled up
+	};
+
+	spi1_pins_c: spi1@2 {
+		pins = "PD10", "PD11", "PD12", "PD13","PD14", "PD15";
+		function = "gpio_in";
+		drive-strength = <10>;
+	};
+
+	ledc_pins_a: ledc@0 {
+		pins = "PC0";
+		function = "ledc";
+		drive-strength = <10>;
+	};
+
+	ledc_pins_b: ledc@1 {
+		pins = "PC0";
+		function = "gpio_in";
+	};
+
+	pwm0_pin_a: pwm0@0 {
+		pins = "PD16";
+		function = "pwm0";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	pwm0_pin_b: pwm0@1 {
+		pins = "PD16";
+		function = "gpio_in";
+		bias-disable;
+	};
+
+	pwm2_pin_a: pwm2@0 {
+		pins = "PD18";
+		function = "pwm2";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	pwm2_pin_b: pwm2@1 {
+		pins = "PD18";
+		function = "gpio_in";
+	};
+
+/*
+	pwm7_pin_a: pwm7@0 {
+		pins = "PD22";
+		function = "pwm7";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	pwm7_pin_b: pwm7@1 {
+		pins = "PD22";
+		function = "gpio_in";
+	};
+*/
+
+	s_cir0_pins_a: s_cir@0 {
+		pins = "PB12";
+		function = "ir";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	s_cir0_pins_b: s_cir@1 {
+		pins = "PB12";
+		function = "gpio_in";
+	};
+
+	ir1_pins_a: ir1@0 {
+		pins = "PB0";
+		function = "ir";
+		drive-strength = <10>;
+		bias-pull-up;
+	};
+
+	ir1_pins_b: ir1@1 {
+		pins = "PB0";
+		function = "gpio_in";
+	};
+
+	backlight_control: backlight_control@0 {
+		pins = "PD20";
+		function = "gpio_out";
+	};
+
+};
+
+&uart0 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-1 = <&uart0_pins_b>;
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&uart1_pins_a>;
+	pinctrl-1 = <&uart1_pins_b>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&uart2_pins_a>;
+	pinctrl-1 = <&uart2_pins_b>;
+	status = "disabled";
+};
+
+&uart3 {
+	/*compatible = "allwinner,sun20iw1-dsp-uart";*/
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&uart3_pins_a>;
+	pinctrl-1 = <&uart3_pins_a>;
+	status = "disabled";
+};
+
+&soc {
+	card0_boot_para@2 {
+		/*
+		 * Avoid dtc compiling warnings.
+		 * @TODO: Developer should modify this to the actual value
+		 */
+		reg = <0x0 0x2 0x0 0x0>;
+		device_type = "card0_boot_para";
+		card_ctrl = <0x0>;
+		card_high_speed = <0x1>;
+		card_line = <0x4>;
+		pinctrl-0 = <&sdc0_pins_a>;
+	};
+
+	card2_boot_para@3 {
+		/*
+		 * Avoid dtc compiling warnings.
+		 * @TODO: Developer should modify this to the actual value
+		 */
+		reg = <0x0 0x3 0x0 0x0>;
+		device_type = "card2_boot_para";
+		card_ctrl = <0x2>;
+		card_high_speed = <0x1>;
+		card_line = <0x4>;
+		pinctrl-0 = <&sdc2_pins_a>;
+		/*pinctrl-0 = <&sdc0_pins_a>;*/
+		/*sdc_ex_dly_used = <0x2>;*/
+		sdc_io_1v8 = <0x1>;
+		/*sdc_type = "tm4";*/
+		sdc_tm4_hs200_max_freq = <150>;
+		sdc_tm4_hs400_max_freq = <100>;
+		sdc_ex_dly_used = <2>;
+		/*sdc_tm4_win_th = <8>;*/
+		/*sdc_dis_host_caps = <0x180>;*/
+	};
+
+	rfkill: rfkill@0 {
+		compatible    = "allwinner,sunxi-rfkill";
+		chip_en;
+		power_en;
+		status        = "okay";
+
+		wlan: wlan@0 {
+			compatible    = "allwinner,sunxi-wlan";
+			/*pinctrl-0 = <&wlan_pins_a>;
+			pinctrl-names = "default";
+			clock-names = "32k-fanout1";
+			clocks = <&ccu CLK_FANOUT1_OUT>;*/
+			wlan_busnum    = <0x1>;
+			/*wlan_regon    = <&pio PG 11 GPIO_ACTIVE_HIGH>;*/
+			/*wlan_hostwake  = <&pio PG 10 GPIO_ACTIVE_HIGH>;*/
+			/*wlan_power    = "VCC-3V3";*/
+			/*wlan_power_vol = <3300000>;*/
+			/*interrupt-parent = <&pio>;
+			interrupts = < PG 10 IRQ_TYPE_LEVEL_HIGH>;*/
+			wakeup-source;
+
+		};
+
+		bt: bt@0 {
+			compatible    = "allwinner,sunxi-bt";
+			/*pinctrl-0 = <&wlan_pins_a>;
+			pinctrl-names = "default";
+			clock-names = "32k-fanout1";
+			clocks = <&ccu CLK_FANOUT1_OUT>;*/
+			/*bt_power_num = <0x01>;*/
+			/*bt_power      = "axp803-dldo1";*/
+			/*bt_io_regulator = "axp803-dldo1";*/
+			/*bt_io_vol = <3300000>;*/
+			/*bt_power_vol = <330000>;*/
+			bt_rst_n      = <&pio PG 18 GPIO_ACTIVE_LOW>;
+			status        = "okay";
+		};
+	};
+
+	btlpm: btlpm@0 {
+		compatible  = "allwinner,sunxi-btlpm";
+		uart_index  = <0x1>;
+		bt_wake     = <&pio PG 16 GPIO_ACTIVE_HIGH>;
+		bt_hostwake = <&pio PG 17 GPIO_ACTIVE_HIGH>;
+		status      = "okay";
+	};
+
+	addr_mgt: addr_mgt@0 {
+		compatible     = "allwinner,sunxi-addr_mgt";
+		type_addr_wifi = <0x0>;
+		type_addr_bt   = <0x0>;
+		type_addr_eth  = <0x0>;
+		status         = "okay";
+	};
+	
+	battery: battery@0 {
+    		compatible = "simple-battery";
+    		constant-charge-current-max-microamp = <2100000>;
+    		voltage-min-design-microvolt = <3300000>;
+ 	};
+
+	wifi_pwrseq: wifi-pwrseq {
+  		compatible = "mmc-pwrseq-simple";
+  		clocks = <&rtc 1>;
+  		clock-names = "ext_clock";
+  		reset-gpios = <&pio PG 11 GPIO_ACTIVE_LOW>;
+  		post-power-on-delay-ms = <200>;
+ 	};
+};
+
+&sdc2 {
+	non-removable;
+	bus-width = <4>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	no-sdio;
+	no-sd;
+	ctl-spec-caps = <0x308>;
+	cap-mmc-highspeed;
+	sunxi-power-save-mode;
+	sunxi-dis-signal-vol-sw;
+	mmc-bootpart-noacc;
+	max-frequency = <150000000>;
+	/*vmmc-supply = <&reg_dcdc1>;*/
+	/*emmc io vol 3.3v*/
+	/*vqmmc-supply = <&reg_aldo1>;*/
+	/*emmc io vol 1.8v*/
+	/*vqmmc-supply = <&reg_eldo1>;*/
+	status = "disabled";
+};
+
+&sdc0 {
+	bus-width = <4>;
+	cd-gpios = <&pio PF 6 (GPIO_PULL_UP)>;
+	non-removable;
+	/*broken-cd;*/
+	cd-inverted;
+	/*data3-detect;*/
+	/*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/
+	cd-used-24M;
+	cap-sd-highspeed;
+	/*sd-uhs-sdr50;*/
+	/*sd-uhs-ddr50;*/
+	/*sd-uhs-sdr104;*/
+	no-sdio;
+	no-mmc;
+	sunxi-power-save-mode;
+	/*sunxi-dis-signal-vol-sw;*/
+	max-frequency = <150000000>;
+	ctl-spec-caps = <0x8>;
+	/*vmmc-supply = <&reg_dcdc1>;*/
+	/*vqmmc33sw-supply = <&reg_dcdc1>;*/
+	/*vdmmc33sw-supply = <&reg_dcdc1>;*/
+	/*vqmmc18sw-supply = <&reg_eldo1>;*/
+	/*vdmmc18sw-supply = <&reg_eldo1>;*/
+	status = "okay";
+};
+
+&sdc1 {
+ 	vmmc-supply = <&reg_dldo1>;
+ 	vqmmc-supply = <&reg_aldo3>;
+ 	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	no-mmc;
+	no-sd;
+	cap-sd-highspeed;
+	/*sd-uhs-sdr12*/
+	/*sd-uhs-sdr25;*/
+	/*sd-uhs-sdr50;*/
+	/*sd-uhs-ddr50;*/
+	/*sd-uhs-sdr104;*/
+	/*sunxi-power-save-mode;*/
+	/*sunxi-dis-signal-vol-sw;*/
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	ignore-pm-notify;
+	max-frequency = <150000000>;
+	ctl-spec-caps = <0x8>;
+	status = "okay";
+	brcm: sdio-wifi@1 {
+  		reg = <1>;
+  		interrupt-parent = <&pio>;
+  		interrupts = <PG 10 IRQ_TYPE_LEVEL_LOW>;
+  		interrupt-names = "host-wake";
+ 	};
+};
+
+
+/*
+tvd configuration
+used                   (create device, 0: do not create device, 1: create device)
+agc_auto_enable        (0: agc manual mode,agc_manual_value is valid; 1: agc auto mode)
+agc_manual_value       (agc manual value, default value is 64)
+cagc_enable            (cagc        0: disable, 1: enable)
+fliter_used            (3d fliter   0: disable, 1: enable)
+support two PMU power  (tvd_power0, tvd_power1)
+support two GPIO power (tvd_gpio0, tvd_gpio1)
+NOTICE: If tvd need pmu power or gpio power,params need be configured under [tvd]
+tvd_sw                 (the switch of all tvd driver.)
+tvd_interface          (0: cvbs, 1: ypbpr,)
+tvd_format             (0:TVD_PL_YUV420 , 1: MB_YUV420, 2: TVD_PL_YUV422)
+tvd_system             (0:ntsc, 1:pal)
+tvd_row                (total row number in multi channel mode 1-2)
+tvd_column             (total column number in multi channel mode 1-2)
+tvd_channelx_en        (0:disable, 1~4:position in multi channel mode,In single channel
+                       mode,mean enable)
+tvd_row*tvd_column is the total tvd channel number to be used in multichannel mode
++--------------------+--------------------+
+|                    |                    |
+|                    |                    |
+|         1          |         2          |
+|                    |                    |
+|                    |                    |
++--------------------+--------------------+
+|                    |                    |
+|                    |                    |
+|         3          |         4          |
+|                    |                    |
+|                    |                    |
++--------------------+--------------------+
+*/
+
+&tvd {
+	tvd_sw          = <1>;
+	tvd_interface   = <0>;
+	tvd_format      = <0>;
+	tvd_system      = <1>;
+	tvd_row         = <1>;
+	tvd_column      = <1>;
+	tvd_channel0_en = <1>;
+	tvd_channel1_en = <0>;
+	tvd_channel2_en = <0>;
+	tvd_channel3_en = <0>;
+	/*tvd_gpio0 = <&pio PD 22 GPIO_ACTIVE_HIGH>;*/
+	/*tvd_gpio1 = <&pio PD 23 GPIO_ACTIVE_HIGH>;*/
+	/*tvd_gpio2 = <&pio PD 24 GPIO_ACTIVE_HIGH>;*/
+	/*	dc1sw-supply = <&reg_dc1sw>;*/
+	/*	eldo3-supply = <&reg_eldo3>;*/
+	/*tvd_power0      = "dc1sw"*/
+	/*tvd_power1      = "eldo3"*/
+};
+
+&tvd0 {
+	used                    = <1>;
+	agc_auto_enable         = <1>;
+	agc_manual_value        = <64>;
+	cagc_enable             = <1>;
+	fliter_used             = <1>;
+};
+
+/* Audio Driver modules */
+&sunxi_rpaf_dsp0 {
+	status = "okay";
+};
+
+/* if audiocodec is used, sdc0 and uart0 should be closed to enable PA. */
+&codec {
+	/* MIC and headphone gain setting */
+	mic1gain 	= <0x13>;
+	mic2gain 	= <0x13>;
+	mic3gain 	= <0x13>;
+	/* ADC/DAC DRC/HPF func enabled */
+        /* 0x1:DAP_HP_EN; 0x2:DAP_SPK_EN; 0x3:DAP_HPSPK_EN */
+	adcdrc_cfg 	= <0x0>;
+	adchpf_cfg 	= <0x1>;
+	dacdrc_cfg 	= <0x0>;
+	dachpf_cfg 	= <0x0>;
+	/* Volume about */
+	digital_vol 	= <0x00>;
+	lineout_vol 	= <0x1a>;
+	headphonegain	= <0x03>;
+	/* Pa enabled about */
+	pa_level 	= <0x01>;
+	pa_pwr_level 	= <0x01>;
+	pa_msleep_time 	= <0x78>;
+	gpio-spk	= <&pio PE 1 GPIO_ACTIVE_HIGH>;
+	gpio-spk-pwr	= <&pio PB 2 GPIO_ACTIVE_HIGH>;
+	/* regulator about */
+	/* avcc-supply	= <&reg_aldo1>; */
+	/* hpvcc-supply	= <&reg_eldo1>; */
+	status = "okay";
+};
+
+&sndcodec {
+	hp_detect_case	= <0x01>;
+	jack_enable	= <0x01>;
+	status = "okay";
+};
+
+&dummy_cpudai {
+	/* CMA config about */
+	playback_cma	= <128>;
+	capture_cma	= <256>;
+	status = "okay";
+};
+
+&dmic {
+	pinctrl-names   = "default","sleep";
+	pinctrl-0       = <&dmic_pins_a>;
+	pinctrl-1       = <&dmic_pins_b>;
+	status = "disabled";
+};
+
+&sounddmic {
+	status = "disabled";
+};
+
+&dmic_codec {
+	status = "disabled";
+};
+
+/*-----------------------------------------------------------------------------
+ * pcm_lrck_period	16/32/64/128/256
+ *			(set 0x20 for HDMI audio out)
+ * slot_width_select	16bits/20bits/24bits/32bits
+ *			(set 0x20 for HDMI audio out)
+ * frametype		0 --> short frame = 1 clock width;
+ *			1 --> long frame = 2 clock width;
+ * tdm_config		0 --> pcm
+ *			1 --> i2s
+ *			(set 0x01 for HDMI audio out)
+ * mclk_div		0 --> not output
+ *			1/2/4/6/8/12/16/24/32/48/64/96/128/176/192
+ *			(set mclk as external codec clk source, freq is pll_audio/mclk_div)
+ * pinctrl_used		0 --> I2S/PCM use for internal (e.g. HDMI)
+ *			1 --> I2S/PCM use for external audio
+ * daudio_type:		0 --> external audio type
+ *			1 --> HDMI audio type
+ *---------------------------------------------------------------------------*/
+&daudio0 {
+	mclk_div 	= <0x01>;
+	frametype 	= <0x00>;
+	tdm_config 	= <0x01>;
+	sign_extend 	= <0x00>;
+	msb_lsb_first 	= <0x00>;
+	pcm_lrck_period = <0x80>;
+	slot_width_select = <0x20>;
+	pinctrl-names   = "default", "sleep";
+	pinctrl-0       = <&daudio0_pins_a>;
+	pinctrl-1       = <&daudio0_pins_b>;
+	pinctrl_used	= <0x0>;
+	status = "disabled";
+};
+
+/*-----------------------------------------------------------------------------
+ * simple-audio-card,name	name of sound card, e.g.
+ *				"snddaudio0" --> use for external audio
+ *				"sndhdmi" --> use for HDMI audio
+ * sound-dai			"snd-soc-dummy" --> use for I2S
+ *				"hdmiaudio" --> use for HDMI audio
+ *				"ac108" --> use for external audio of ac108
+ *---------------------------------------------------------------------------*/
+&sounddaudio0 {
+	/* simple-audio-card,format = "i2s"; */
+	/* simple-audio-card,frame-master = <&daudio0_master>; */
+	/* simple-audio-card,bitclock-master = <&daudio0_master>; */
+	/* simple-audio-card,bitclock-inversion; */
+	/* simple-audio-card,frame-inversion; */
+	status = "disabled";
+	daudio0_master: simple-audio-card,codec {
+		/* sound-dai = <&ac108>; */
+	};
+};
+
+&daudio1 {
+	mclk_div 	= <0x01>;
+	frametype 	= <0x00>;
+	tdm_config 	= <0x01>;
+	sign_extend 	= <0x00>;
+	msb_lsb_first 	= <0x00>;
+	pcm_lrck_period = <0x80>;
+	slot_width_select = <0x20>;
+	pinctrl-names   = "default", "sleep";
+	pinctrl-0       = <&daudio1_pins_a>;
+	pinctrl-1       = <&daudio1_pins_b>;
+	pinctrl_used	= <0x0>;
+	status = "disabled";
+};
+
+&sounddaudio1 {
+	status = "disabled";
+	daudio1_master: simple-audio-card,codec {
+		/* sound-dai = <&ac108>; */
+	};
+};
+
+&daudio2 {
+	mclk_div 	= <0x00>;
+	frametype 	= <0x00>;
+	tdm_config 	= <0x01>;
+	sign_extend 	= <0x00>;
+	tx_data_mode 	= <0x00>;
+	rx_data_mode 	= <0x00>;
+	msb_lsb_first 	= <0x00>;
+	pcm_lrck_period = <0x20>;
+	slot_width_select = <0x20>;
+	asrc_function_en  = <0x00>;
+	pinctrl-names   = "default", "sleep";
+	/*pinctrl-0       = <&daudio2_pins_a &daudio2_pins_b &daudio2_pins_c>;*/
+	/*pinctrl-1       = <&daudio2_pins_d>;*/
+	/* HDMI audio, no need pin */
+	pinctrl-0;
+	pinctrl-1;
+	pinctrl_used	= <0x0>;
+	daudio_type	= <0x1>;
+	status = "okay";
+};
+
+/* if HDMI audio is used, daudio2 should be enable. */
+&hdmiaudio {
+//	status = "okay";
+	status = "disabled";
+};
+
+&sounddaudio2 {
+	status = "okay";
+	simple-audio-card,name = "sndhdmi";
+	daudio2_master: simple-audio-card,codec {
+		sound-dai = <&hdmiaudio>;
+	};
+};
+
+&spdif {
+	pinctrl-names   = "default","sleep";
+	pinctrl-0       = <&spdif_pins_a>;
+	pinctrl-1       = <&spdif_pins_b>;
+	status = "disabled";
+};
+
+&soundspdif {
+	status = "disabled";
+};
+
+/*
+ *usb_port_type: usb mode. 0-device, 1-host, 2-otg.
+ *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect.
+ *usb_detect_mode: 0-thread scan, 1-id gpio interrupt.
+ *usb_id_gpio: gpio for id detect.
+ *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl";
+ *usb_wakeup_suspend:0-SUPER_STANDBY, 1-USB_STANDBY.
+ */
+&usbc0 {
+	device_type = "usbc0";
+	usb_port_type = <0x0>;
+	usb_detect_type = <0x1>;
+	usb_detect_mode = <0>;
+	usb_id_gpio = <&pio PD 21 GPIO_ACTIVE_HIGH>;
+	enable-active-high;
+	/*usb_det_vbus_gpio = <&pio PD 20 GPIO_ACTIVE_HIGH>;*/
+	usb_wakeup_suspend = <0>;
+	usb_serial_unique = <0>;
+	usb_serial_number = "20080411";
+	rndis_wceis = <1>;
+	status = "okay";
+};
+
+&ehci0 {
+	drvvbus-supply = <&reg_usb1_vbus>;
+};
+
+&ohci0 {
+	drvvbus-supply = <&reg_usb1_vbus>;
+};
+
+&usbc1 {
+	device_type = "usbc1";
+	usb_regulator_io = "nocare";
+	usb_wakeup_suspend = <0>;
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&twi0 {
+	clock-frequency = <400000>;
+	pinctrl-0 = <&twi0_pins_a>;
+	pinctrl-1 = <&twi0_pins_b>;
+	pinctrl-names = "default", "sleep";
+	status = "okay";
+
+axp22x: pmic@34 {
+  interrupt-controller;
+  #interrupt-cells = <1>;
+  compatible = "x-powers,axp221";
+  reg = <0x34>;
+  interrupt-parent = <&pio>;
+  interrupts = <PE 9 IRQ_TYPE_LEVEL_LOW>;
+
+  regulators {
+
+   x-powers,dcdc-freq = <3000>;
+
+   reg_aldo1: aldo1 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "audio-vdd";
+   };
+
+   reg_aldo2: aldo2 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "display-vcc";
+   };
+
+   reg_aldo3: aldo3 {
+    regulator-always-on;
+    regulator-min-microvolt = <1800000>;
+    regulator-max-microvolt = <1800000>;
+    regulator-name = "wifi-vdd";
+   };
+
+   reg_dldo1: dldo1 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "wifi-vcc1";
+   };
+
+   reg_dldo2: dldo2 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "dldo2";
+   };
+
+   reg_dldo3: dldo3 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "dldo3";
+   };
+
+   reg_dldo4: dldo4 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "dldo4";
+   };
+
+   reg_eldo1: eldo1 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "wifi-vcc2";
+   };
+
+   reg_eldo2: eldo2 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "wifi-vcc3";
+   };
+
+   reg_eldo3: eldo3 {
+    regulator-always-on;
+    regulator-min-microvolt = <3300000>;
+    regulator-max-microvolt = <3300000>;
+    regulator-name = "wifi-vcc4";
+   };
+
+  };
+
+  battery_power_supply: battery-power-supply {
+   compatible = "x-powers,axp221-battery-power-supply";
+   monitored-battery = <&battery>;
+  };
+
+  ac_power_supply: ac_power_supply {
+   compatible = "x-powers,axp221-ac-power-supply";
+  };
+ }; 
+};
+
+&twi1 {
+	clock-frequency = <400000>;
+	pinctrl-0 = <&twi1_pins_a>;
+	pinctrl-1 = <&twi1_pins_b>;
+	pinctrl-names = "default", "sleep";
+	status = "disabled";
+};
+
+&twi2 {
+	clock-frequency = <400000>;
+	pinctrl-0 = <&twi2_pins_a>;
+	pinctrl-1 = <&twi2_pins_b>;
+	pinctrl-names = "default", "sleep";
+	dmas = <&dma 45>, <&dma 45>;
+	dma-names = "tx", "rx";
+	status = "disabled";
+
+	/* pcf8574-usage:
+	 * only use gpio0~7, 0 means PP0.
+	 * pin set:
+	 * gpios = <&pcf8574 0 GPIO_ACTIVE_LOW>;
+	 * interrupt set:
+	 * interrupt-parent = <&pcf8574>;
+	 * interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+	 */
+	pcf8574: gpio@38 {
+		compatible = "nxp,pcf8574";
+		reg = <0x38>;
+		gpio_base = <2020>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&pio>;
+		interrupts = <PB 2 IRQ_TYPE_EDGE_FALLING>;
+		status = "disabled";
+	};
+
+	ctp@14 {
+		compatible = "allwinner,goodix";
+		device_type = "ctp";
+		reg = <0x14>;
+		status = "disabled";
+		ctp_name = "gt9xxnew_ts";
+		ctp_twi_id = <0x2>;
+		ctp_twi_addr = <0x14>;
+		ctp_screen_max_x = <0x320>;
+		ctp_screen_max_y = <0x500>;
+		ctp_revert_x_flag = <0x0>;
+		ctp_revert_y_flag = <0x0>;
+		ctp_exchange_x_y_flag = <0x0>;
+		ctp_int_port = <&pio PG 14 GPIO_ACTIVE_HIGH>;
+		ctp_wakeup = <&pio PG 15 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&twi3 {
+	clock-frequency = <400000>;
+	pinctrl-0 = <&twi3_pins_a>;
+	pinctrl-1 = <&twi3_pins_b>;
+	pinctrl-names = "default", "sleep";
+	status = "disabled";
+};
+
+&gmac0 {
+	phy-mode = "rgmii";
+	use_ephy25m = <1>;
+	pinctrl-0 = <&gmac_pins_a>;
+	pinctrl-1 = <&gmac_pins_b>;
+	pinctrl-names = "default", "sleep";
+	phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
+	tx-delay = <3>; /*2~4*/
+	rx-delay = <0>;
+	status = "disabled";
+};
+
+&spi0 {
+	clock-frequency = <100000000>;
+	pinctrl-0 = <&spi0_pins_a &spi0_pins_b>;
+	pinctrl-1 = <&spi0_pins_c>;
+	pinctrl-names = "default", "sleep";
+	/*spi-supply = <&reg_dcdc1>;*/
+	spi_slave_mode = <0>;
+	spi0_cs_number = <1>;
+        spi0_cs_bitmap = <1>;
+	status = "disabled";
+
+	spi-nand@0 {
+		compatible = "spi-nand";
+		spi-max-frequency=<0x5F5E100>;
+		reg = <0x0>;
+		spi-rx-bus-width=<0x04>;
+		spi-tx-bus-width=<0x04>;
+		status="disabled";
+	};
+};
+
+&spi1 {
+	clock-frequency = <100000000>;
+	pinctrl-0 = <&spi1_pins_a &spi1_pins_b>;
+	pinctrl-1 = <&spi1_pins_c>;
+	pinctrl-names = "default", "sleep";
+	spi_slave_mode = <0>;
+	status = "okay";
+
+	spi_board1@0 {
+		device_type = "spi_board1";
+		compatible = "rohm,dh2228fv";
+		spi-max-frequency = <0x5f5e100>;
+		reg = <0x0>;
+		spi-rx-bus-width = <0x4>;
+		spi-tx-bus-width = <0x4>;
+		status = "okay";
+	};
+};
+
+&ledc {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&ledc_pins_a>;
+	pinctrl-1 = <&ledc_pins_b>;
+	led_count = <12>;
+	output_mode = "GRB";
+	reset_ns = <84>;
+	t1h_ns = <800>;
+	t1l_ns = <320>;
+	t0h_ns = <300>;
+	t0l_ns = <800>;
+	wait_time0_ns = <84>;
+	wait_time1_ns = <84>;
+	wait_data_time_ns = <600000>;
+	status	= "disabled";
+};
+
+&keyboard0 {
+	key0 = <210 0x160>;
+	wakeup-source;
+	status = "okay";
+};
+
+/*----------------------------------------------------------------------------------
+disp init configuration
+
+disp_mode             (0:screen0<screen0,fb0>)
+screenx_output_type   (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
+screenx_output_mode   (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
+                      (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
+screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
+screenx_output_bits   (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
+screenx_output_eotf   (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
+screenx_output_cs     (for hdmi, 0:undefined  257:BT709 260:BT601  263:BT2020)
+screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
+screen0_output_range   (for hdmi, 0:default 1:full 2:limited)
+screen0_output_scan    (for hdmi, 0:no data 1:overscan 2:underscan)
+screen0_output_aspect_ratio  (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
+fbx format            (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
+fbx pixel sequence    (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
+fb0_scaler_mode_enable(scaler mode enable, used FE)
+fbx_width,fbx_height  (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
+lcdx_backlight        (lcd init backlight,the range:[0,256],default:197
+lcdx_yy               (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
+lcd0_contrast         (LCD contrast, 0~100)
+lcd0_saturation       (LCD saturation, 0~100)
+lcd0_hue              (LCD hue, 0~100)
+framebuffer software rotation setting:
+disp_rotation_used:   (0:disable; 1:enable,you must set fbX_width to lcd_y,
+set fbX_height to lcd_x)
+degreeX:              (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
+degreeX_Y:            (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
+devX_output_type : config output type in bootGUI framework in UBOOT-2018.
+				   (0:none; 1:lcd; 2:tv; 4:hdmi;)
+devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
+devX_screen_id   : config display index of bootGUI framework in UBOOT-2018
+devX_do_hpd      : whether do hpd detectation or not in UBOOT-2018
+chn_cfg_mode     : Hardware DE channel allocation config. 0:single display with 6
+				   channel, 1:dual display with 4 channel in main display and 2 channel in second
+                   display, 2:dual display with 3 channel in main display and 3 channel in second
+                   in display.
+----------------------------------------------------------------------------------*/
+&disp {
+	disp_init_enable         = <1>;
+	disp_mode                = <0>;
+
+	screen0_output_type      = <1>;
+	screen0_output_mode      = <4>;
+
+	screen1_output_type      = <3>;
+	screen1_output_mode      = <10>;
+
+	screen1_output_format    = <0>;
+	screen1_output_bits      = <0>;
+	screen1_output_eotf      = <4>;
+	screen1_output_cs        = <257>;
+	screen1_output_dvi_hdmi  = <2>;
+	screen1_output_range     = <2>;
+	screen1_output_scan      = <0>;
+	screen1_output_aspect_ratio = <8>;
+
+	dev0_output_type         = <1>;
+	dev0_output_mode         = <4>;
+	dev0_screen_id           = <0>;
+	dev0_do_hpd              = <0>;
+
+	dev1_output_type         = <4>;
+	dev1_output_mode         = <10>;
+	dev1_screen_id           = <1>;
+	dev1_do_hpd              = <1>;
+
+	def_output_dev           = <0>;
+	hdmi_mode_check          = <1>;
+
+	fb0_format               = <0>;
+	fb0_width                = <0>;
+	fb0_height               = <0>;
+
+	fb1_format               = <0>;
+	fb1_width                = <0>;
+	fb1_height               = <0>;
+	chn_cfg_mode             = <1>;
+
+	disp_para_zone           = <1>;
+	/*VCC-LCD*/
+/*	dc1sw-supply = <&reg_dc1sw>;*/
+	/*VCC-DSI*/
+/*	eldo3-supply = <&reg_eldo3>;*/
+	/*VCC-PD*/
+/*	dcdc1-supply = <&reg_dcdc1>;*/
+};
+
+/*----------------------------------------------------------------------------------
+;lcd0 configuration
+
+;lcd_if:               0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
+;lcd_hv_if             0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
+;lcd_hv_clk_phase      0:0 degree;1:90 degree;2:180 degree;3:270 degree
+;lcd_hv_sync_polarity  0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
+;lcd_hv_syuv_seq       0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
+;lcd_cpu_if            0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
+;                      6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
+;lcd_cpu_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
+;lcd_dsi_if            0:video mode; 1: Command mode; 2:video burst mode
+;lcd_dsi_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
+;lcd_x:                lcd horizontal resolution
+;lcd_y:                lcd vertical resolution
+;lcd_width:            width of lcd in mm
+;lcd_height:           height of lcd in mm
+;lcd_dclk_freq:        in MHZ unit
+;lcd_pwm_freq:         in HZ unit
+;lcd_pwm_pol:          lcd backlight PWM polarity
+;lcd_pwm_max_limit     lcd backlight PWM max limit(<=255)
+;lcd_hbp:              hsync back porch(pixel) + hsync plus width(pixel);
+;lcd_ht:               hsync total cycle(pixel)
+;lcd_vbp:              vsync back porch(line) + vysnc plus width(line)
+;lcd_vt:               vysnc total cycle(line)
+;lcd_hspw:             hsync plus width(pixel)
+;lcd_vspw:             vysnc plus width(pixel)
+;lcd_lvds_if:          0:single link;  1:dual link
+;lcd_lvds_colordepth:  0:8bit; 1:6bit
+;lcd_lvds_mode:        0:NS mode; 1:JEIDA mode
+;lcd_frm:              0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
+;lcd_io_phase:         0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
+;                      8~11bit:dclk phase; 12~15bit:de phase)
+;lcd_gamma_en          lcd gamma correction enable
+;lcd_bright_curve_en   lcd bright curve correction enable
+;lcd_cmap_en           lcd color map function enable
+;deu_mode              0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
+;lcdgamma4iep:         Smart Backlight parameter, lcd gamma vale * 10;
+;                      decrease it while lcd is not bright enough; increase while lcd is too bright
+;smart_color           90:normal lcd screen 65:retina lcd screen(9.7inch)
+;Pin setting for special function ie.LVDS, RGB data or vsync
+;   name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
+;Pin setting for gpio:
+;   lcd_gpio_X     = port:PD12<pin function><pull up or pull down><drive ability><output level>
+;Pin setting for backlight enable pin
+;   lcd_bl_en     = port:PD12<pin function><pull up or pull down><drive ability><output level>
+;fsync setting, pulse to csi
+;lcd_fsync_en          (0:disable fsync,1:enable)
+;lcd_fsync_act_time    (active time of fsync, unit:pixel)
+;lcd_fsync_dis_time    (disactive time of fsync, unit:pixel)
+;lcd_fsync_pol         (0:positive;1:negative)
+;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
+pull up or pull down(default 0), driver level(default 1), data>
+;For dual link lvds: use lvds2link_pins_a  and lvds2link_pins_b instead
+;For rgb24: use rgb24_pins_a  and rgb24_pins_b instead
+;For lvds1: use lvds1_pins_a  and lvds1_pins_b instead
+;For lvds0: use lvds0_pins_a  and lvds0_pins_b instead
+;----------------------------------------------------------------------------------*/
+&lcd0 {
+	lcd_used            = <1>;
+
+	lcd_driver_name     = "icn9707_480x1280";
+	lcd_backlight       = <50>;
+	lcd_if              = <4>;
+
+	lcd_x               = <480>;
+	lcd_y               = <1280>;
+	lcd_width           = <60>;
+	lcd_height          = <160>;
+	lcd_dclk_freq       = <55>;
+
+	lcd_pwm_used        = <1>;
+	lcd_pwm_ch          = <2>;
+	lcd_pwm_freq        = <1000>;
+	lcd_pwm_pol         = <0>;
+	lcd_pwm_max_limit   = <255>;
+
+	lcd_hbp             = <150>;
+	lcd_ht              = <694>;
+	lcd_hspw            = <40>;
+	lcd_vbp             = <12>;
+	lcd_vt              = <1308>;
+	lcd_vspw            = <10>;
+
+	lcd_dsi_if          = <0>;
+	lcd_dsi_lane        = <4>;
+	lcd_lvds_if         = <0>;
+	lcd_lvds_colordepth = <0>;
+	lcd_lvds_mode       = <0>;
+	lcd_frm             = <0>;
+	lcd_hv_clk_phase    = <0>;
+	lcd_hv_sync_polarity= <0>;
+	lcd_io_phase        = <0x0000>;
+	lcd_gamma_en        = <0>;
+	lcd_bright_curve_en = <0>;
+	lcd_cmap_en         = <0>;
+	lcd_fsync_en        = <0>;
+	lcd_fsync_act_time  = <1000>;
+	lcd_fsync_dis_time  = <1000>;
+	lcd_fsync_pol       = <0>;
+
+	deu_mode            = <0>;
+	lcdgamma4iep        = <22>;
+	smart_color         = <90>;
+	
+	lcd_gpio_0 =  <&pio PD 19 GPIO_ACTIVE_HIGH>;
+//	lcd_gpio_1 = <&pio PD 20 GPIO_ACTIVE_HIGH>;
+	pinctrl-0 = <&dsi4lane_pins_a>;
+	pinctrl-1 = <&dsi4lane_pins_b>;
+};
+
+&hdmi {
+	hdmi_used = <1>;
+	hdmi_power_cnt = <0>;
+	hdmi_cts_compatibility = <1>;
+	hdmi_hdcp_enable = <1>;
+	hdmi_hdcp22_enable = <0>;
+	hdmi_cec_support = <1>;
+	hdmi_cec_super_standby = <0>;
+
+	ddc_en_io_ctrl = <0>;
+	power_io_ctrl = <0>;
+	status = "disabled";
+};
+
+&pwm0 {
+	pinctrl-names = "active", "sleep";
+	pinctrl-0 = <&pwm0_pin_a>;
+	pinctrl-1 = <&pwm0_pin_b>;
+	status = "okay";
+};
+
+&pwm2 {
+	pinctrl-names = "active", "sleep";
+	pinctrl-0 = <&pwm2_pin_a>;
+	pinctrl-1 = <&pwm2_pin_b>;
+	status = "okay";
+};
+/*
+&pwm7 {
+	pinctrl-names = "active", "sleep";
+	pinctrl-0 = <&pwm7_pin_a>;
+	pinctrl-1 = <&pwm7_pin_b>;
+	status = "okay";
+};
+*/
+
+&rtp {
+	allwinner,tp-sensitive-adjust = <0xf>;
+	allwinner,filter-type = <0x1>;
+	allwinner,ts-attached;
+	status = "disabled";
+};
+
+&gpadc {
+	channel_num = <2>;
+	channel_select = <3>;
+	channel_data_select = <3>;
+	channel_compare_select = <3>;
+	channel_cld_select = <3>;
+	channel_chd_select = <3>;
+	channel0_compare_lowdata = <1700000>;
+	channel0_compare_higdata = <1200000>;
+	channel1_compare_lowdata = <460000>;
+	channel1_compare_higdata = <1200000>;
+	status = "disabled";
+};
+
+&s_cir0 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&s_cir0_pins_a>;
+	pinctrl-1 = <&s_cir0_pins_b>;
+	status = "disabled";
+};
+
+&ir1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&ir1_pins_a>;
+	pinctrl-1 = <&ir1_pins_b>;
+	status = "disabled";
+};

+ 4715 - 0
Code/patch/d1/config

@@ -0,0 +1,4715 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/riscv 5.4.61 Kernel Configuration
+#
+CONFIG_CC_VERSION_TEXT="riscv64-unknown-linux-gnu-gcc (C-SKY RISCV Tools V1.8.4 B20200702) 8.1.0"
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=80100
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_HAS_ASM_GOTO=y
+CONFIG_IRQ_WORK=y
+CONFIG_THREAD_INFO_IN_TASK=y
+
+#
+# General setup
+#
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_BUILD_SALT=""
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_CROSS_MEMORY_ATTACH=y
+# CONFIG_USELIB is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_MSI_IOMMU=y
+CONFIG_SPARSE_IRQ=y
+# CONFIG_GENERIC_IRQ_DEBUGFS is not set
+# end of IRQ subsystem
+
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+# end of Timers subsystem
+
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_PREEMPTION=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_PSI is not set
+# end of CPU/Task time and stats accounting
+
+#
+# RCU Subsystem
+#
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_EXPERT is not set
+CONFIG_SRCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_TASKS_RCU=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+# end of RCU Subsystem
+
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_IKHEADERS is not set
+CONFIG_LOG_BUF_SHIFT=25
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=21
+CONFIG_GENERIC_SCHED_CLOCK=y
+
+#
+# Scheduler features
+#
+# end of Scheduler features
+
+CONFIG_ARCH_SUPPORTS_INT128=y
+CONFIG_CGROUPS=y
+CONFIG_PAGE_COUNTER=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_MEMCG_SWAP_ENABLED=y
+CONFIG_MEMCG_KMEM=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_WRITEBACK=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_CGROUP_PIDS=y
+# CONFIG_CGROUP_RDMA is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_BPF=y
+CONFIG_EXPERT=y
+CONFIG_MULTIUSER=y
+# CONFIG_SGETMASK_SYSCALL is not set
+CONFIG_SYSFS_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_FHANDLE is not set
+CONFIG_POSIX_TIMERS=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_FUTEX_PI=y
+CONFIG_HAVE_FUTEX_CMPXCHG=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+# CONFIG_AIO is not set
+CONFIG_IO_URING=y
+CONFIG_ADVISE_SYSCALLS=y
+CONFIG_MEMBARRIER=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_BASE_RELATIVE=y
+# CONFIG_BPF_SYSCALL is not set
+# CONFIG_USERFAULTFD is not set
+# CONFIG_EMBEDDED is not set
+CONFIG_HAVE_PERF_EVENTS=y
+# CONFIG_PC104 is not set
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# end of Kernel Performance Events And Counters
+
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLAB_MERGE_DEFAULT=y
+# CONFIG_SLAB_FREELIST_RANDOM is not set
+# CONFIG_SLAB_FREELIST_HARDENED is not set
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
+CONFIG_SYSTEM_DATA_VERIFICATION=y
+# CONFIG_PROFILING is not set
+# end of General setup
+
+CONFIG_64BIT=y
+CONFIG_RISCV=y
+CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+CONFIG_ARCH_MMAP_RND_BITS_MAX=24
+CONFIG_MMU=y
+CONFIG_ZONE_DMA32=y
+CONFIG_VA_BITS=39
+CONFIG_PA_BITS=56
+CONFIG_PAGE_OFFSET=0xffffffe000000000
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_PGTABLE_LEVELS=3
+CONFIG_SUNXI_SOC_NAME="sun20iw1"
+
+#
+# SoC selection
+#
+# CONFIG_SOC_SIFIVE is not set
+CONFIG_RISCV_SUNXI=y
+CONFIG_ARCH_SUNXI=y
+# CONFIG_FPGA_V4_PLATFORM is not set
+# CONFIG_FPGA_V7_PLATFORM is not set
+CONFIG_EVB_PLATFORM=y
+CONFIG_ARCH_SUN20I=y
+CONFIG_ARCH_SUN20IW1=y
+CONFIG_ARCH_SUN20IW1P1=y
+# end of SoC selection
+
+#
+# Platform type
+#
+# CONFIG_ARCH_RV32I is not set
+CONFIG_ARCH_RV64I=y
+# CONFIG_CMODEL_MEDLOW is not set
+CONFIG_CMODEL_MEDANY=y
+CONFIG_MODULE_SECTIONS=y
+# CONFIG_MAXPHYSMEM_2GB is not set
+CONFIG_MAXPHYSMEM_128GB=y
+# CONFIG_SMP is not set
+CONFIG_TUNE_GENERIC=y
+CONFIG_RISCV_ISA_C=y
+CONFIG_FPU=y
+CONFIG_VECTOR=y
+# end of Platform type
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# end of Kernel features
+
+#
+# Boot options
+#
+CONFIG_CMDLINE=""
+# end of Boot options
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Idle
+#
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_CPU_IDLE_GOV_TEO is not set
+
+#
+# RISCV CPU Idle Drivers
+#
+# CONFIG_RISCV_CPUIDLE is not set
+# end of RISCV CPU Idle Drivers
+# end of CPU Idle
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+# end of CPU Frequency scaling
+# end of CPU Power Management
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_SUSPEND_SKIP_SYNC is not set
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_SLEEP=y
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_WAKELOCKS is not set
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_PM_SLEEP_DEBUG=y
+CONFIG_PM_CLK=y
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_CPU_PM=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# end of Power management options
+
+#
+# General architecture-dependent options
+#
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
+CONFIG_LTO_NONE=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_ARCH_MMAP_RND_BITS=18
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_64BIT_TIME=y
+# CONFIG_REFCOUNT_FULL is not set
+# CONFIG_LOCK_EVENT_COUNTS is not set
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# end of GCOV-based kernel profiling
+
+CONFIG_PLUGIN_HOSTCC=""
+# end of General architecture-dependent options
+
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+# CONFIG_MODULE_COMPRESS is not set
+# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_TRIM_UNUSED_KSYMS is not set
+CONFIG_BLOCK=y
+CONFIG_BLK_SCSI_REQUEST=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+# CONFIG_BLK_DEV_ZONED is not set
+# CONFIG_BLK_DEV_THROTTLING is not set
+# CONFIG_BLK_CMDLINE_PARSER is not set
+# CONFIG_BLK_WBT is not set
+# CONFIG_BLK_CGROUP_IOLATENCY is not set
+# CONFIG_BLK_CGROUP_IOCOST is not set
+CONFIG_BLK_DEBUG_FS=y
+# CONFIG_BLK_SED_OPAL is not set
+# CONFIG_BLK_INLINE_ENCRYPTION is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# end of Partition Types
+
+CONFIG_BLK_MQ_VIRTIO=y
+CONFIG_BLK_PM=y
+
+#
+# IO Schedulers
+#
+CONFIG_MQ_IOSCHED_DEADLINE=y
+CONFIG_MQ_IOSCHED_KYBER=y
+# CONFIG_IOSCHED_BFQ is not set
+# end of IO Schedulers
+
+CONFIG_ASN1=y
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_ARCH_HAS_MMIOWB=y
+# CONFIG_GKI_HIDDEN_DRM_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_REGMAP_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_CRYPTO_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_SND_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_SND_SOC_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_MMC_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_GPIO_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_QCOM_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_MEDIA_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_VIRTUAL_CONFIGS is not set
+# CONFIG_GKI_LEGACY_WEXT_ALLCONFIG is not set
+# CONFIG_GKI_HIDDEN_USB_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_SOC_BUS_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_RPMSG_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_GPU_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_IRQ_CONFIGS is not set
+# CONFIG_GKI_HIDDEN_HYPERVISOR_CONFIGS is not set
+# CONFIG_GKI_HACKS_TO_FIX is not set
+# CONFIG_GKI_OPT_FEATURES is not set
+CONFIG_FREEZER=y
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ELFCORE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_SCRIPT=y
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+# CONFIG_BINFMT_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_COREDUMP=y
+# end of Executable file formats
+
+#
+# Memory Management options
+#
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_MEMORY_ISOLATION=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+CONFIG_CONTIG_ALLOC=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+# CONFIG_FRONTSWAP is not set
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+# CONFIG_CMA_DEBUGFS is not set
+CONFIG_CMA_AREAS=7
+# CONFIG_ZPOOL is not set
+# CONFIG_ZBUD is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_FRAME_VECTOR=y
+# CONFIG_PERCPU_STATS is not set
+# CONFIG_GUP_BENCHMARK is not set
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+# end of Memory Management options
+
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=y
+CONFIG_UNIX=y
+CONFIG_UNIX_SCM=y
+CONFIG_UNIX_DIAG=y
+# CONFIG_TLS is not set
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_FIB_TRIE_STATS=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+CONFIG_IP_MROUTE_COMMON=y
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_INET_RAW_DIAG is not set
+# CONFIG_INET_DIAG_DESTROY is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_ILA is not set
+# CONFIG_IPV6_VTI is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_PIMSM_V2 is not set
+# CONFIG_IPV6_SEG6_LWTUNNEL is not set
+# CONFIG_IPV6_SEG6_HMAC is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_BRIDGE_NETFILTER is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_INGRESS is not set
+CONFIG_NETFILTER_NETLINK=y
+# CONFIG_NETFILTER_NETLINK_ACCT is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NETFILTER_NETLINK_OSF is not set
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_LOG_COMMON=m
+# CONFIG_NF_LOG_NETDEV is not set
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_ZONES is not set
+CONFIG_NF_CONNTRACK_PROCFS=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_TIMEOUT=y
+CONFIG_NF_CONNTRACK_TIMESTAMP=y
+# CONFIG_NF_CONNTRACK_LABELS is not set
+# CONFIG_NF_CT_PROTO_DCCP is not set
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+# CONFIG_NF_CONNTRACK_FTP is not set
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_SNMP is not set
+# CONFIG_NF_CONNTRACK_PPTP is not set
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+# CONFIG_NF_CONNTRACK_TFTP is not set
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NF_CT_NETLINK_TIMEOUT=y
+CONFIG_NF_NAT=y
+CONFIG_NF_NAT_REDIRECT=y
+# CONFIG_NF_TABLES is not set
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=m
+CONFIG_NETFILTER_XT_CONNMARK=y
+
+#
+# Xtables targets
+#
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_NAT is not set
+CONFIG_NETFILTER_XT_TARGET_NETMAP=y
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
+# CONFIG_NETFILTER_XT_TARGET_MASQUERADE is not set
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+
+#
+# Xtables matches
+#
+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_BPF is not set
+# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+# CONFIG_NETFILTER_XT_MATCH_CPU is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ECN is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
+# CONFIG_NETFILTER_XT_MATCH_HL is not set
+# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# end of Core Netfilter Configuration
+
+# CONFIG_IP_SET is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=y
+# CONFIG_NF_SOCKET_IPV4 is not set
+# CONFIG_NF_TPROXY_IPV4 is not set
+# CONFIG_NF_DUP_IPV4 is not set
+# CONFIG_NF_LOG_ARP is not set
+CONFIG_NF_LOG_IPV4=m
+CONFIG_NF_REJECT_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_RPFILTER is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+# CONFIG_IP_NF_TARGET_SYNPROXY is not set
+# CONFIG_IP_NF_NAT is not set
+CONFIG_IP_NF_MANGLE=y
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# end of IP: Netfilter Configuration
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_NF_SOCKET_IPV6 is not set
+# CONFIG_NF_TPROXY_IPV6 is not set
+# CONFIG_NF_DUP_IPV6 is not set
+# CONFIG_NF_REJECT_IPV6 is not set
+# CONFIG_NF_LOG_IPV6 is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# end of IPv6: Netfilter Configuration
+
+CONFIG_NF_DEFRAG_IPV6=y
+# CONFIG_NF_CONNTRACK_BRIDGE is not set
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_BPFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+CONFIG_STP=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+CONFIG_HAVE_NET_DSA=y
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_6LOWPAN is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+# CONFIG_DNS_RESOLVER is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_NETLINK_DIAG is not set
+# CONFIG_MPLS is not set
+# CONFIG_NET_NSH is not set
+# CONFIG_HSR is not set
+# CONFIG_NET_SWITCHDEV is not set
+# CONFIG_NET_L3_MASTER_DEV is not set
+# CONFIG_NET_NCSI is not set
+# CONFIG_CGROUP_NET_PRIO is not set
+# CONFIG_CGROUP_NET_CLASSID is not set
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# end of Network testing
+# end of Networking options
+
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_GW=y
+# CONFIG_CAN_J1939 is not set
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_VXCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_FLEXCAN is not set
+# CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_C_CAN is not set
+# CONFIG_CAN_CC770 is not set
+# CONFIG_CAN_IFI_CANFD is not set
+# CONFIG_CAN_M_CAN is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_SOFTING is not set
+
+#
+# CAN SPI interfaces
+#
+# CONFIG_CAN_HI311X is not set
+# CONFIG_CAN_MCP251X is not set
+# end of CAN SPI interfaces
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_8DEV_USB is not set
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_GS_USB is not set
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_MCBA_USB is not set
+# CONFIG_CAN_PEAK_USB is not set
+# CONFIG_CAN_UCAN is not set
+# end of CAN USB interfaces
+
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# end of CAN Device Drivers
+
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+# CONFIG_BT_HS is not set
+# CONFIG_BT_LE is not set
+# CONFIG_BT_LEDS is not set
+# CONFIG_BT_SELFTEST is not set
+CONFIG_BT_DEBUGFS=y
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+# CONFIG_BT_HCIUART_ATH3K is not set
+# CONFIG_BT_HCIUART_INTEL is not set
+# CONFIG_BT_HCIUART_AG6XX is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+CONFIG_BCM_BT_LPM=y
+# CONFIG_RTL_BT_LPM is not set
+# CONFIG_XR_BT_LPM is not set
+# CONFIG_BT_MRVL is not set
+# CONFIG_BT_MTKSDIO is not set
+# end of Bluetooth device drivers
+
+# CONFIG_AF_RXRPC is not set
+# CONFIG_AF_KCM is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y
+CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_DEBUGFS is not set
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_CFG80211_WEXT=y
+# CONFIG_MAC80211 is not set
+CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_LEDS=y
+# CONFIG_RFKILL_INPUT is not set
+CONFIG_RFKILL_GPIO=y
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+# CONFIG_PSAMPLE is not set
+# CONFIG_NET_IFE is not set
+# CONFIG_LWTUNNEL is not set
+CONFIG_DST_CACHE=y
+CONFIG_GRO_CELLS=y
+# CONFIG_FAILOVER is not set
+CONFIG_HAVE_EBPF_JIT=y
+
+#
+# Device Drivers
+#
+CONFIG_HAVE_PCI=y
+# CONFIG_PCI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_UEVENT_HELPER is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+
+#
+# Firmware loader
+#
+CONFIG_FW_LOADER=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_FW_LOADER_USER_HELPER is not set
+# CONFIG_FW_LOADER_COMPRESS is not set
+CONFIG_FW_CACHE=y
+# end of Firmware loader
+
+CONFIG_WANT_DEV_COREDUMP=y
+CONFIG_ALLOW_DEV_COREDUMP=y
+CONFIG_DEV_COREDUMP=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
+# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
+CONFIG_GENERIC_CPU_DEVICES=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_IRQ=y
+CONFIG_DMA_SHARED_BUFFER=y
+# CONFIG_DMA_FENCE_TRACE is not set
+# end of Generic Driver Options
+
+#
+# Bus devices
+#
+# CONFIG_MOXTET is not set
+# CONFIG_SIMPLE_PM_BUS is not set
+# CONFIG_SUN50I_DE2_BUS is not set
+# CONFIG_SUNXI_RSB is not set
+CONFIG_SUNXI_MBUS=y
+# CONFIG_SUNXI_NSI is not set
+# end of Bus devices
+
+# CONFIG_CONNECTOR is not set
+# CONFIG_GNSS is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+# CONFIG_MTD_SUNXI_PARTS is not set
+
+#
+# Partition parsers
+#
+# end of Partition parsers
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_BLKDEVS=y
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+# CONFIG_MTD_PARTITIONED_MASTER is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# end of RAM/ROM/Flash chip drivers
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+# end of Mapping drivers for chip access
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_MCHP23K256 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+# end of Self-contained MTD device drivers
+
+# CONFIG_MTD_ONENAND is not set
+# CONFIG_MTD_RAW_NAND is not set
+# CONFIG_MTD_SPI_NAND is not set
+
+#
+# sunxi-nand
+#
+CONFIG_AW_MTD_SPINAND=y
+# CONFIG_AW_MTD_RAWNAND is not set
+CONFIG_AW_SPINAND_PHYSICAL_LAYER=y
+CONFIG_AW_SPINAND_SECURE_STORAGE=y
+# CONFIG_AW_SPINAND_PSTORE_MTD_PART is not set
+# CONFIG_AW_SPINAND_ENABLE_PHY_CRC16 is not set
+CONFIG_AW_SPINAND_SIMULATE_MULTIPLANE=y
+# end of sunxi-nand
+
+#
+# LPDDR & LPDDR2 PCM memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# end of LPDDR & LPDDR2 PCM memory drivers
+
+# CONFIG_MTD_SPI_NOR is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_MTD_UBI_BLOCK=y
+# CONFIG_MTD_HYPERBUS is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_RESERVED_MEM=y
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_VIRTIO_BLK is not set
+# CONFIG_BLK_DEV_RBD is not set
+
+#
+# NVME Support
+#
+# CONFIG_NVME_FC is not set
+# CONFIG_NVME_TARGET is not set
+# end of NVME Support
+
+#
+# Misc devices
+#
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_SRAM is not set
+# CONFIG_XILINX_SDFEC is not set
+# CONFIG_PVPANIC is not set
+# CONFIG_HISI_HIKEY_USB is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_93XX46 is not set
+# CONFIG_EEPROM_IDT_89HPESX is not set
+# CONFIG_EEPROM_EE1004 is not set
+# end of EEPROM support
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# end of Texas Instruments shared transport line discipline
+
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+# CONFIG_ALTERA_STAPL is not set
+
+#
+# Intel MIC & related support
+#
+
+#
+# Intel MIC Bus Driver
+#
+
+#
+# SCIF Bus Driver
+#
+
+#
+# VOP Bus Driver
+#
+# CONFIG_VOP_BUS is not set
+
+#
+# Intel MIC Host Driver
+#
+
+#
+# Intel MIC Card Driver
+#
+
+#
+# SCIF Driver
+#
+
+#
+# Intel MIC Coprocessor State Management (COSM) Drivers
+#
+
+#
+# VOP Driver
+#
+# end of Intel MIC & related support
+
+# CONFIG_ECHO is not set
+# CONFIG_MISC_RTSX_USB is not set
+CONFIG_SUNXI_RFKILL=y
+CONFIG_SUNXI_ADDR_MGT=y
+# CONFIG_SUNXI_BOOTEVENT is not set
+
+#
+# sunxi Gorilla ESL platform
+#
+# CONFIG_SUNXI_GORILLA is not set
+# end of sunxi Gorilla ESL platform
+# end of Misc devices
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# end of SCSI Transports
+
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_VIRTIO is not set
+# CONFIG_SCSI_DH is not set
+# end of SCSI device support
+
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_IPVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_GENEVE is not set
+# CONFIG_GTP is not set
+# CONFIG_MACSEC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_TUN is not set
+# CONFIG_TUN_VNET_CROSS_LE is not set
+# CONFIG_VETH is not set
+# CONFIG_VIRTIO_NET is not set
+# CONFIG_NLMON is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# end of Distributed Switch Architecture drivers
+
+# CONFIG_ETHERNET is not set
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_BUS=y
+# CONFIG_MDIO_BCM_UNIMAC is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
+# CONFIG_MDIO_HISI_FEMAC is not set
+# CONFIG_MDIO_MSCC_MIIM is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_SUN4I is not set
+CONFIG_PHYLIB=y
+CONFIG_SWPHY=y
+# CONFIG_LED_TRIGGER_PHY is not set
+
+#
+# MII PHY device drivers
+#
+# CONFIG_ADIN_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_AQUANTIA_PHY is not set
+# CONFIG_AX88796B_PHY is not set
+# CONFIG_AT803X_PHY is not set
+# CONFIG_BCM7XXX_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_CORTINA_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_DP83822_PHY is not set
+# CONFIG_DP83TC811_PHY is not set
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+CONFIG_FIXED_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_INTEL_XWAY_PHY is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_MARVELL_10G_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_MICROCHIP_PHY is not set
+# CONFIG_MICROCHIP_T1_PHY is not set
+# CONFIG_MICROSEMI_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_NXP_TJA11XX_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_RENESAS_PHY is not set
+# CONFIG_ROCKCHIP_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_TERANETICS_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_XILINX_GMII2RGMII is not set
+# CONFIG_MICREL_KS8995MA is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_USB_NET_DRIVERS is not set
+CONFIG_WLAN=y
+# CONFIG_WIRELESS_WDS is not set
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
+# CONFIG_WLAN_VENDOR_ATH is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
+CONFIG_WLAN_VENDOR_BROADCOM=y
+CONFIG_BRCMUTIL=m
+CONFIG_BRCMFMAC=m
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_SDIO=y
+# CONFIG_BRCMFMAC_USB is not set
+CONFIG_BRCM_TRACING=y
+CONFIG_BRCMDBG=y
+# CONFIG_WLAN_VENDOR_CISCO is not set
+# CONFIG_WLAN_VENDOR_INTEL is not set
+# CONFIG_WLAN_VENDOR_INTERSIL is not set
+# CONFIG_WLAN_VENDOR_MARVELL is not set
+# CONFIG_WLAN_VENDOR_MEDIATEK is not set
+# CONFIG_WLAN_VENDOR_RALINK is not set
+# CONFIG_WLAN_VENDOR_REALTEK is not set
+# CONFIG_WLAN_VENDOR_RSI is not set
+# CONFIG_WLAN_VENDOR_ST is not set
+# CONFIG_WLAN_VENDOR_TI is not set
+# CONFIG_WLAN_VENDOR_ZYDAS is not set
+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
+# CONFIG_XR829_WLAN is not set
+# CONFIG_SPARD_WLAN_SUPPORT is not set
+# CONFIG_BCMDHD is not set
+# CONFIG_AIC_WLAN_SUPPORT is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_VIRT_WIFI is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_NETDEVSIM is not set
+# CONFIG_NET_FAILOVER is not set
+CONFIG_ISDN=y
+# CONFIG_ISDN_CAPI is not set
+# CONFIG_MISDN is not set
+# CONFIG_NVM is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_LEDS=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+# CONFIG_INPUT_MATRIXKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_SENSORINIT is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADC is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1050 is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_DLINK_DIR685 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_SUN4I_LRADC is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_BCM is not set
+CONFIG_KEYBOARD_SUNXI=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_PROPERTIES=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ADC is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_BU21029 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_EGALAX is not set
+# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
+# CONFIG_TOUCHSCREEN_EXC3000 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+# CONFIG_TOUCHSCREEN_HIDEEP is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_S6SY761 is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
+# CONFIG_TOUCHSCREEN_ELAN is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_TSC2004 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_RM_TS is not set
+# CONFIG_TOUCHSCREEN_SILEAD is not set
+# CONFIG_TOUCHSCREEN_SIS_I2C is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_STMFTS is not set
+CONFIG_TOUCHSCREEN_SUN4I=y
+# CONFIG_TOUCHSCREEN_SUR40 is not set
+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_ZET6223 is not set
+# CONFIG_TOUCHSCREEN_ZFORCE is not set
+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
+# CONFIG_TOUCHSCREEN_IQS5XX is not set
+# CONFIG_TOUCHSCREEN_GSLX680NEW is not set
+# CONFIG_TOUCHSCREEN_GT9XXNEW_TS is not set
+# CONFIG_TOUCHSCREEN_GT9XXNEWDUP_TS is not set
+# CONFIG_TOUCHSCREEN_FTS is not set
+# CONFIG_INPUT_MISC is not set
+# CONFIG_RMI4_CORE is not set
+CONFIG_INPUT_SENSOR=y
+# CONFIG_SENSORS_SC7A20 is not set
+# CONFIG_SENSORS_MIR3DA is not set
+# CONFIG_STK3X1X is not set
+# CONFIG_SUNXI_TPADC is not set
+CONFIG_SUNXI_GPADC=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+# CONFIG_SERIO_GPIO_PS2 is not set
+# CONFIG_USERIO is not set
+# CONFIG_GAMEPORT is not set
+# end of Hardware I/O ports
+# end of Input device support
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_NULL_TTY is not set
+CONFIG_LDISC_AUTOLOAD=y
+CONFIG_DEVMEM=y
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_EARLYCON=y
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+# CONFIG_SERIAL_SAMSUNG is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_SIFIVE is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_SERIAL_FSL_LINFLEXUART is not set
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+# CONFIG_SERIAL_SPRD is not set
+CONFIG_SERIAL_SUNXI=y
+# CONFIG_SERIAL_SUNXI_DMA is not set
+CONFIG_SERIAL_SUNXI_CONSOLE=y
+# CONFIG_SERIAL_SUNXI_EARLYCON is not set
+# end of Serial drivers
+
+# CONFIG_SERIAL_DEV_BUS is not set
+# CONFIG_TTY_PRINTK is not set
+CONFIG_HVC_DRIVER=y
+# CONFIG_HVC_RISCV_SBI is not set
+CONFIG_VIRTIO_CONSOLE=m
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_XILLYBUS is not set
+# CONFIG_SUNXI_BS83B16C is not set
+# end of Character devices
+
+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
+CONFIG_DUMP_REG=y
+CONFIG_DUMP_REG_MISC=y
+CONFIG_SUNXI_G2D=y
+CONFIG_SUNXI_G2D_MIXER=y
+CONFIG_SUNXI_G2D_ROTATE=y
+# CONFIG_SUNXI_SYNCFENCE is not set
+# CONFIG_SUNXI_DI is not set
+CONFIG_SUNXI_SYS_INFO=y
+# CONFIG_SUNXI_QA_TEST is not set
+# CONFIG_SUNXI_SMC is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+
+#
+# Multiplexer I2C Chip support
+#
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_MUX_GPIO is not set
+# CONFIG_I2C_MUX_GPMUX is not set
+# CONFIG_I2C_MUX_LTC4306 is not set
+# CONFIG_I2C_MUX_PCA9541 is not set
+# CONFIG_I2C_MUX_PCA954x is not set
+# CONFIG_I2C_MUX_PINCTRL is not set
+# CONFIG_I2C_MUX_REG is not set
+# CONFIG_I2C_DEMUX_PINCTRL is not set
+# CONFIG_I2C_MUX_MLXCPLD is not set
+# end of Multiplexer I2C Chip support
+
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CBUS_GPIO is not set
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_EMEV2 is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_MV64XXX is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SUNXI=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_RK3X is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# end of I2C Hardware Bus support
+
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# end of I2C support
+
+# CONFIG_I3C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+# CONFIG_SPI_MEM is not set
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+# CONFIG_SPI_AXI_SPI_ENGINE is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_DESIGNWARE is not set
+# CONFIG_SPI_NXP_FLEXSPI is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_FSL_SPI is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_ROCKCHIP is not set
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SPI_SUN4I is not set
+# CONFIG_SPI_SUN6I is not set
+# CONFIG_SPI_MXIC is not set
+CONFIG_SPI_SUNXI=y
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_LOOPBACK_TEST is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_SPI_SLAVE is not set
+# CONFIG_SPMI is not set
+# CONFIG_HSI is not set
+# CONFIG_PPS is not set
+
+#
+# PTP clock support
+#
+# CONFIG_PTP_1588_CLOCK is not set
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# end of PTP clock support
+
+CONFIG_PINCTRL=y
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+CONFIG_GENERIC_PINCONF=y
+# CONFIG_DEBUG_PINCTRL is not set
+# CONFIG_PINCTRL_AXP209 is not set
+# CONFIG_PINCTRL_AMD is not set
+# CONFIG_PINCTRL_MCP23S08 is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_SX150X is not set
+# CONFIG_PINCTRL_STMFX is not set
+# CONFIG_PINCTRL_OCELOT is not set
+
+#
+# Allwinner SOC PINCTRL DRIVER
+#
+CONFIG_PINCTRL_SUNXI=y
+# CONFIG_PINCTRL_SUNXI_DEBUGFS is not set
+# CONFIG_PINCTRL_SUNXI_TEST is not set
+# CONFIG_PINCTRL_SUN8IW15P1 is not set
+# CONFIG_PINCTRL_SUN8IW15P1_R is not set
+CONFIG_PINCTRL_SUN8IW20=y
+# CONFIG_PINCTRL_SUN50IW9 is not set
+# CONFIG_PINCTRL_SUN50IW9_R is not set
+# CONFIG_PINCTRL_SUN50IW10P1 is not set
+# CONFIG_PINCTRL_SUN50IW10P1_R is not set
+# CONFIG_PINCTRL_SUN50IW12 is not set
+# CONFIG_PINCTRL_SUN50IW12_R is not set
+# CONFIG_PINCTRL_SUN4I_A10 is not set
+# CONFIG_PINCTRL_SUN5I is not set
+# CONFIG_PINCTRL_SUN6I_A31 is not set
+# CONFIG_PINCTRL_SUN6I_A31_R is not set
+# CONFIG_PINCTRL_SUN8I_A23 is not set
+# CONFIG_PINCTRL_SUN8I_A33 is not set
+# CONFIG_PINCTRL_SUN8I_A83T is not set
+# CONFIG_PINCTRL_SUN8I_A83T_R is not set
+# CONFIG_PINCTRL_SUN8I_A23_R is not set
+# CONFIG_PINCTRL_SUN8I_H3 is not set
+# CONFIG_PINCTRL_SUN8I_H3_R is not set
+# CONFIG_PINCTRL_SUN8I_V3S is not set
+# CONFIG_PINCTRL_SUN9I_A80 is not set
+# CONFIG_PINCTRL_SUN9I_A80_R is not set
+# CONFIG_PINCTRL_SUN50I_A64 is not set
+# CONFIG_PINCTRL_SUN50I_A64_R is not set
+# CONFIG_PINCTRL_SUN50I_A100 is not set
+# CONFIG_PINCTRL_SUN50I_A100_R is not set
+# CONFIG_PINCTRL_SUN50I_H5 is not set
+# CONFIG_PINCTRL_SUN50I_H6 is not set
+# CONFIG_PINCTRL_SUN50I_H6_R is not set
+# end of Allwinner SOC PINCTRL DRIVER
+
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
+CONFIG_OF_GPIO=y
+CONFIG_GPIOLIB_IRQCHIP=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers
+#
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_SUNXI is not set
+# CONFIG_GPIO_CADENCE is not set
+# CONFIG_GPIO_DWAPB is not set
+# CONFIG_GPIO_FTGPIO010 is not set
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_GRGPIO is not set
+# CONFIG_GPIO_HLWD is not set
+# CONFIG_GPIO_MB86S7X is not set
+# CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_AMD_FCH is not set
+# end of Memory mapped GPIO drivers
+
+#
+# I2C GPIO expanders
+#
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_BS83B16C is not set
+# CONFIG_GPIO_GW_PLD is not set
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+CONFIG_GPIO_PCF857X=y
+# CONFIG_GPIO_TPIC2810 is not set
+# end of I2C GPIO expanders
+
+#
+# MFD GPIO expanders
+#
+# end of MFD GPIO expanders
+
+#
+# SPI GPIO expanders
+#
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_MAX3191X is not set
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_PISOSR is not set
+# CONFIG_GPIO_XRA1403 is not set
+# end of SPI GPIO expanders
+
+#
+# USB GPIO expanders
+#
+# end of USB GPIO expanders
+
+# CONFIG_GPIO_MOCKUP is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_AVS is not set
+# CONFIG_POWER_RESET is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_POWER_SUPPLY_HWMON=y
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_CHARGER_ADP5061 is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_LEGO_EV3 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_CHARGER_SBS is not set
+# CONFIG_MANAGER_SBS is not set
+# CONFIG_BATTERY_BQ27XXX is not set
+CONFIG_CHARGER_AXP20X=y
+CONFIG_BATTERY_AXP20X=y
+CONFIG_AXP20X_POWER=y
+# CONFIG_AXP288_FUEL_GAUGE is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_CHARGER_LT3651 is not set
+# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_BQ24257 is not set
+# CONFIG_CHARGER_BQ24735 is not set
+# CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+# CONFIG_CHARGER_RT9455 is not set
+# CONFIG_CHARGER_UCS1002 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_AS370 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ASPEED is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FTSTEUTATES is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_IIO_HWMON is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_POWR1220 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LTC2945 is not set
+# CONFIG_SENSORS_LTC2990 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4222 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4260 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX31722 is not set
+# CONFIG_SENSORS_MAX6621 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MAX31790 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_TC654 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_NCT6683 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+# CONFIG_SENSORS_NPCM7XX is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_PWM_FAN is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SHT3x is not set
+# CONFIG_SENSORS_SHTC1 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_STTS751 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_ADC128D818 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_INA3221 is not set
+# CONFIG_SENSORS_TC74 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP103 is not set
+# CONFIG_SENSORS_TMP108 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83773G is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_THERMAL=y
+# CONFIG_THERMAL_STATISTICS is not set
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_THERMAL_OF=y
+# CONFIG_THERMAL_WRITABLE_TRIPS is not set
+# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+CONFIG_THERMAL_GOV_USER_SPACE=y
+# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
+CONFIG_THERMAL_EMULATION=y
+# CONFIG_THERMAL_MMIO is not set
+# CONFIG_QORIQ_THERMAL is not set
+CONFIG_SUNXI_THERMAL=y
+# CONFIG_GENERIC_ADC_THERMAL is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=0
+# CONFIG_WATCHDOG_SYSFS is not set
+
+#
+# Watchdog Pretimeout Governors
+#
+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_GPIO_WATCHDOG is not set
+# CONFIG_XILINX_WATCHDOG is not set
+# CONFIG_ZIIRAVE_WATCHDOG is not set
+# CONFIG_CADENCE_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+CONFIG_SUNXI_WATCHDOG=y
+# CONFIG_MAX63XX_WATCHDOG is not set
+# CONFIG_MEN_A21_WDT is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_ACT8945A is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_BCM590XX is not set
+# CONFIG_MFD_BD9571MWV is not set
+# CONFIG_MFD_AXP2101_I2C is not set
+CONFIG_MFD_AXP20X=y
+CONFIG_MFD_AXP20X_I2C=y
+# CONFIG_MFD_MADERA is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9062 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_HI6421_PMIC is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77620 is not set
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_MENF21BMC is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_CPCAP is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RT5033 is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_RK808 is not set
+# CONFIG_MFD_RN5T618 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+CONFIG_MFD_SUN6I_PRCM=y
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_TI_LMU is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65086 is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TI_LP873X is not set
+# CONFIG_MFD_TI_LP87565 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TQMX86 is not set
+# CONFIG_MFD_LOCHNAGAR is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_ROHM_BD718XX is not set
+# CONFIG_MFD_ROHM_BD70528 is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_STMFX is not set
+# end of Multifunction device drivers
+
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_88PG86X is not set
+# CONFIG_REGULATOR_ACT8865 is not set
+# CONFIG_REGULATOR_AD5398 is not set
+CONFIG_REGULATOR_AXP20X=y
+CONFIG_SUNXI_REGULATOR_PWM=y
+# CONFIG_REGULATOR_DA9210 is not set
+# CONFIG_REGULATOR_DA9211 is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+# CONFIG_REGULATOR_GPIO is not set
+# CONFIG_REGULATOR_ISL9305 is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+# CONFIG_REGULATOR_LTC3589 is not set
+# CONFIG_REGULATOR_LTC3676 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_MCP16502 is not set
+# CONFIG_REGULATOR_MT6311 is not set
+# CONFIG_REGULATOR_PFUZE100 is not set
+# CONFIG_REGULATOR_PV88060 is not set
+# CONFIG_REGULATOR_PV88080 is not set
+# CONFIG_REGULATOR_PV88090 is not set
+# CONFIG_REGULATOR_PWM is not set
+# CONFIG_REGULATOR_SLG51000 is not set
+# CONFIG_REGULATOR_SY8106A is not set
+# CONFIG_REGULATOR_SY8824X is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS65132 is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+# CONFIG_REGULATOR_VCTRL is not set
+CONFIG_RC_CORE=y
+CONFIG_RC_MAP=y
+CONFIG_LIRC=y
+# CONFIG_RC_DECODERS is not set
+# CONFIG_RC_DEVICES is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_SDR_SUPPORT is not set
+# CONFIG_MEDIA_CEC_SUPPORT is not set
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+# CONFIG_VIDEO_V4L2_SUBDEV_API is not set
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L2_I2C=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+
+#
+# Media drivers
+#
+CONFIG_MEDIA_USB_SUPPORT=y
+
+#
+# Webcam devices
+#
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+# CONFIG_USB_GSPCA is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_USBTV is not set
+
+#
+# Webcam, TV (analog/digital) USB devices
+#
+# CONFIG_VIDEO_EM28XX is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+# CONFIG_VIDEO_CADENCE is not set
+# CONFIG_VIDEO_ASPEED is not set
+# CONFIG_VIDEO_SUNXI_TVD is not set
+# CONFIG_SUNXI_PLATFORM_DRIVERS is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+# CONFIG_CYPRESS_FIRMWARE is not set
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_V4L2=y
+CONFIG_VIDEOBUF2_MEMOPS=m
+CONFIG_VIDEOBUF2_VMALLOC=m
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
+#
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+# CONFIG_VIDEO_IR_I2C is not set
+
+#
+# I2C Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS3308 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_UDA1342 is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+# CONFIG_VIDEO_SONY_BTF_MPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7183 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_ML86V7667 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_TW2804 is not set
+# CONFIG_VIDEO_TW9903 is not set
+# CONFIG_VIDEO_TW9906 is not set
+# CONFIG_VIDEO_TW9910 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV7393 is not set
+# CONFIG_VIDEO_AK881X is not set
+# CONFIG_VIDEO_THS8200 is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV2640 is not set
+# CONFIG_VIDEO_OV2659 is not set
+# CONFIG_VIDEO_OV2680 is not set
+# CONFIG_VIDEO_OV2685 is not set
+# CONFIG_VIDEO_OV6650 is not set
+# CONFIG_VIDEO_OV5695 is not set
+# CONFIG_VIDEO_OV772X is not set
+# CONFIG_VIDEO_OV7640 is not set
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_OV7740 is not set
+# CONFIG_VIDEO_OV9640 is not set
+# CONFIG_VIDEO_VS6624 is not set
+# CONFIG_VIDEO_MT9M111 is not set
+# CONFIG_VIDEO_MT9T112 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_MT9V111 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_RJ54N1 is not set
+
+#
+# Lens drivers
+#
+# CONFIG_VIDEO_AD5820 is not set
+
+#
+# Flash devices
+#
+# CONFIG_VIDEO_ADP1653 is not set
+# CONFIG_VIDEO_LM3560 is not set
+# CONFIG_VIDEO_LM3646 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Audio/Video compression chips
+#
+# CONFIG_VIDEO_SAA6752HS is not set
+
+#
+# SDR tuner chips
+#
+
+#
+# Miscellaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_I2C is not set
+# end of I2C Encoders, decoders, sensors and other helper chips
+
+#
+# SPI helper chips
+#
+# end of SPI helper chips
+
+#
+# Media SPI Adapters
+#
+# end of Media SPI Adapters
+
+#
+# Customise DVB Frontends
+#
+
+#
+# Tools to develop new frontends
+#
+# end of Customise DVB Frontends
+
+CONFIG_VIDEO_ENCODER_DECODER_SUNXI=y
+# CONFIG_VIDEO_GOOGLE_DECODER_SUNXI is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_DRM_DP_CEC is not set
+
+#
+# ARM devices
+#
+# end of ARM devices
+
+#
+# ACP (Audio CoProcessor) Configuration
+#
+# end of ACP (Audio CoProcessor) Configuration
+
+#
+# Frame buffer Devices
+#
+CONFIG_FB_CMDLINE=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_SIMPLE is not set
+# CONFIG_FB_SSD1307 is not set
+
+#
+# Video support for sunxi
+#
+CONFIG_FB_CONSOLE_SUNXI=y
+CONFIG_DISP2_SUNXI=y
+CONFIG_SUNXI_DISP2_FB_DISABLE_ROTATE=y
+# CONFIG_SUNXI_DISP2_FB_ROTATION_SUPPORT is not set
+# CONFIG_SUNXI_DISP2_FB_HW_ROTATION_SUPPORT is not set
+# CONFIG_SUNXI_DISP2_FB_DECOMPRESS_LZMA is not set
+# CONFIG_HDMI_DISP2_SUNXI is not set
+CONFIG_HDMI2_DISP2_SUNXI=y
+CONFIG_AW_PHY=y
+# CONFIG_DEFAULT_PHY is not set
+# CONFIG_HDMI_EP952_DISP2_SUNXI is not set
+CONFIG_HDMI2_HDCP_SUNXI=y
+# CONFIG_HDMI2_HDCP22_SUNXI is not set
+CONFIG_HDMI2_CEC_SUNXI=y
+CONFIG_HDMI2_CEC_USER=y
+# CONFIG_HDMI2_FREQ_SPREAD_SPECTRUM is not set
+# CONFIG_TV_DISP2_SUNXI is not set
+# CONFIG_VDPO_DISP2_SUNXI is not set
+# CONFIG_EDP_DISP2_SUNXI is not set
+# CONFIG_DISP2_SUNXI_BOOT_COLORBAR is not set
+CONFIG_DISP2_SUNXI_DEBUG=y
+# CONFIG_DISP2_SUNXI_COMPOSER is not set
+# CONFIG_DISP2_LCD_ESD_DETECT is not set
+# CONFIG_LCD_FB is not set
+# CONFIG_LCD_FB_ENABLE_DEFERRED_IO is not set
+
+#
+# LCD panels select
+#
+# CONFIG_LCD_SUPPORT_GG1P4062UTSW is not set
+# CONFIG_LCD_SUPPORT_DX0960BE40A1 is not set
+# CONFIG_LCD_SUPPORT_TFT720X1280 is not set
+# CONFIG_LCD_SUPPORT_FD055HD003S is not set
+# CONFIG_LCD_SUPPORT_HE0801A068 is not set
+# CONFIG_LCD_SUPPORT_ILI9341 is not set
+# CONFIG_LCD_SUPPORT_LH219WQ1 is not set
+# CONFIG_LCD_SUPPORT_LS029B3SX02 is not set
+# CONFIG_LCD_SUPPORT_LT070ME05000 is not set
+# CONFIG_LCD_SUPPORT_S6D7AA0X01 is not set
+# CONFIG_LCD_SUPPORT_T27P06 is not set
+# CONFIG_LCD_SUPPORT_TFT720x1280 is not set
+# CONFIG_LCD_SUPPORT_WTQ05027D01 is not set
+# CONFIG_LCD_SUPPORT_H245QBN02 is not set
+# CONFIG_LCD_SUPPORT_ST7789V is not set
+# CONFIG_LCD_SUPPORT_ST7796S is not set
+# CONFIG_LCD_SUPPORT_ST7701S is not set
+# CONFIG_LCD_SUPPORT_T30P106 is not set
+# CONFIG_LCD_SUPPORT_TO20T20000 is not set
+# CONFIG_LCD_SUPPORT_FRD450H40014 is not set
+# CONFIG_LCD_SUPPORT_S2003T46G is not set
+# CONFIG_LCD_SUPPORT_WILLIAMLCD is not set
+# CONFIG_LCD_SUPPORT_LQ101R1SX03 is not set
+# CONFIG_LCD_SUPPORT_INET_DSI_PANEL is not set
+# CONFIG_LCD_SUPPORT_WTL096601G03 is not set
+# CONFIG_LCD_SUPPORT_RT13QV005D is not set
+# CONFIG_LCD_SUPPORT_ST7789V_CPU is not set
+# CONFIG_LCD_SUPPORT_CC08021801_310_800X1280 is not set
+# CONFIG_LCD_SUPPORT_JD9366AB_3 is not set
+CONFIG_LCD_SUPPORT_TFT08006=y
+# end of LCD panels select
+
+#
+# Display engine feature select
+#
+CONFIG_DISP2_SUNXI_SUPPORT_SMBL=y
+CONFIG_DISP2_SUNXI_SUPPORT_ENAHNCE=y
+# end of Display engine feature select
+# end of Video support for sunxi
+# end of Frame buffer Devices
+
+#
+# Backlight & LCD device support
+#
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_PWM is not set
+# CONFIG_BACKLIGHT_PM8941_WLED is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+# CONFIG_BACKLIGHT_LP855X is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+# CONFIG_BACKLIGHT_ARCXCNN is not set
+CONFIG_BACKLIGHT_OCP8178=y
+# end of Backlight & LCD device support
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+CONFIG_VGACON_SOFT_SCROLLBACK=y
+CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64
+# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DUMMY_CONSOLE_COLUMNS=80
+CONFIG_DUMMY_CONSOLE_ROWS=25
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y
+# end of Console display driver support
+
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# end of Graphics support
+
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_DMAENGINE_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_SEQ_DEVICE=y
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_JACK=y
+CONFIG_SND_JACK_INPUT_DEV=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_TIMER=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_MAX_CARDS=32
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_PROC_FS=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
+CONFIG_SND_SEQ_MIDI_EVENT=y
+CONFIG_SND_SEQ_MIDI=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# HD-Audio
+#
+# end of HD-Audio
+
+CONFIG_SND_HDA_PREALLOC_SIZE=64
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+# CONFIG_SND_USB_HIFACE is not set
+# CONFIG_SND_BCD2000 is not set
+# CONFIG_SND_USB_POD is not set
+# CONFIG_SND_USB_PODHD is not set
+# CONFIG_SND_USB_TONEPORT is not set
+# CONFIG_SND_USB_VARIAX is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
+# CONFIG_SND_SOC_AMD_ACP is not set
+# CONFIG_SND_ATMEL_SOC is not set
+# CONFIG_SND_DESIGNWARE_I2S is not set
+
+#
+# SoC Audio for Freescale CPUs
+#
+
+#
+# Common SoC Audio options for Freescale CPUs:
+#
+# CONFIG_SND_SOC_FSL_ASRC is not set
+# CONFIG_SND_SOC_FSL_SAI is not set
+# CONFIG_SND_SOC_FSL_AUDMIX is not set
+# CONFIG_SND_SOC_FSL_SSI is not set
+# CONFIG_SND_SOC_FSL_SPDIF is not set
+# CONFIG_SND_SOC_FSL_ESAI is not set
+# CONFIG_SND_SOC_FSL_MICFIL is not set
+# CONFIG_SND_SOC_IMX_AUDMUX is not set
+# end of SoC Audio for Freescale CPUs
+
+# CONFIG_SND_I2S_HI6210_I2S is not set
+# CONFIG_SND_I2S_HI3660_I2S is not set
+# CONFIG_SND_SOC_IMG is not set
+# CONFIG_SND_SOC_MTK_BTCVSD is not set
+# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
+
+#
+# STMicroelectronics STM32 SOC audio support
+#
+# end of STMicroelectronics STM32 SOC audio support
+
+CONFIG_SND_SUNXI_SOC=y
+CONFIG_SND_SUNXI_SOC_CPUDAI=y
+CONFIG_SND_SUN20IW1_CODEC=y
+
+#
+# Allwinner SoC Audio support
+#
+CONFIG_SND_SUNXI_SOC_SUN20IW1_CODEC=y
+CONFIG_SND_SUNXI_SOC_SIMPLE_CARD=y
+CONFIG_SND_SUNXI_SOC_DAUDIO=y
+# CONFIG_SND_SUNXI_SOC_DAUDIO_ASRC is not set
+CONFIG_SND_SUNXI_SOC_SUNXI_HDMIAUDIO=y
+# CONFIG_SND_SUNXI_SOC_SPDIF is not set
+# CONFIG_SND_SUNXI_SOC_DMIC is not set
+# CONFIG_SUNXI_AUDIO_DEBUG is not set
+# end of Allwinner SoC Audio support
+
+CONFIG_SND_SUNXI_RPAF=y
+CONFIG_SND_SUNXI_MISC_HIFI_DSP=y
+CONFIG_SND_SUNXI_HIFI=y
+# CONFIG_SND_SUNXI_HIFI_CODEC is not set
+# CONFIG_SND_SUNXI_HIFI_DAUDIO is not set
+# CONFIG_SND_SUNXI_HIFI_DMIC is not set
+# CONFIG_SND_SOC_XILINX_I2S is not set
+# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
+# CONFIG_SND_SOC_XILINX_SPDIF is not set
+# CONFIG_SND_SOC_XTFPGA_I2S is not set
+# CONFIG_ZX_TDM is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+
+#
+# CODEC drivers
+#
+# CONFIG_SND_SOC_AC97_CODEC is not set
+# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU1761_I2C is not set
+# CONFIG_SND_SOC_ADAU1761_SPI is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
+# CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4118 is not set
+# CONFIG_SND_SOC_AK4458 is not set
+# CONFIG_SND_SOC_AK4554 is not set
+# CONFIG_SND_SOC_AK4613 is not set
+# CONFIG_SND_SOC_AK4642 is not set
+# CONFIG_SND_SOC_AK5386 is not set
+# CONFIG_SND_SOC_AK5558 is not set
+# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_BD28623 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
+# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS35L33 is not set
+# CONFIG_SND_SOC_CS35L34 is not set
+# CONFIG_SND_SOC_CS35L35 is not set
+# CONFIG_SND_SOC_CS35L36 is not set
+# CONFIG_SND_SOC_CS42L42 is not set
+# CONFIG_SND_SOC_CS42L51_I2C is not set
+# CONFIG_SND_SOC_CS42L52 is not set
+# CONFIG_SND_SOC_CS42L56 is not set
+# CONFIG_SND_SOC_CS42L73 is not set
+# CONFIG_SND_SOC_CS4265 is not set
+# CONFIG_SND_SOC_CS4270 is not set
+# CONFIG_SND_SOC_CS4271_I2C is not set
+# CONFIG_SND_SOC_CS4271_SPI is not set
+# CONFIG_SND_SOC_CS42XX8_I2C is not set
+# CONFIG_SND_SOC_CS43130 is not set
+# CONFIG_SND_SOC_CS4341 is not set
+# CONFIG_SND_SOC_CS4349 is not set
+# CONFIG_SND_SOC_CS53L30 is not set
+# CONFIG_SND_SOC_CX2072X is not set
+CONFIG_SND_SOC_DMIC=y
+# CONFIG_SND_SOC_ES7134 is not set
+# CONFIG_SND_SOC_ES7241 is not set
+# CONFIG_SND_SOC_ES8316 is not set
+# CONFIG_SND_SOC_ES8328_I2C is not set
+# CONFIG_SND_SOC_ES8328_SPI is not set
+# CONFIG_SND_SOC_GTM601 is not set
+# CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_MAX98088 is not set
+# CONFIG_SND_SOC_MAX98357A is not set
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9867 is not set
+# CONFIG_SND_SOC_MAX98927 is not set
+# CONFIG_SND_SOC_MAX98373 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
+# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
+# CONFIG_SND_SOC_PCM1681 is not set
+# CONFIG_SND_SOC_PCM1789_I2C is not set
+# CONFIG_SND_SOC_PCM179X_I2C is not set
+# CONFIG_SND_SOC_PCM179X_SPI is not set
+# CONFIG_SND_SOC_PCM186X_I2C is not set
+# CONFIG_SND_SOC_PCM186X_SPI is not set
+# CONFIG_SND_SOC_PCM3060_I2C is not set
+# CONFIG_SND_SOC_PCM3060_SPI is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
+# CONFIG_SND_SOC_PCM512x_I2C is not set
+# CONFIG_SND_SOC_PCM512x_SPI is not set
+# CONFIG_SND_SOC_RK3328 is not set
+# CONFIG_SND_SOC_RT5616 is not set
+# CONFIG_SND_SOC_RT5631 is not set
+# CONFIG_SND_SOC_SGTL5000 is not set
+# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
+# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
+# CONFIG_SND_SOC_SPDIF is not set
+# CONFIG_SND_SOC_SSM2305 is not set
+# CONFIG_SND_SOC_SSM2602_SPI is not set
+# CONFIG_SND_SOC_SSM2602_I2C is not set
+# CONFIG_SND_SOC_SSM4567 is not set
+# CONFIG_SND_SOC_STA32X is not set
+# CONFIG_SND_SOC_STA350 is not set
+# CONFIG_SND_SOC_STI_SAS is not set
+# CONFIG_SND_SOC_TAS2552 is not set
+# CONFIG_SND_SOC_TAS5086 is not set
+# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TAS6424 is not set
+# CONFIG_SND_SOC_TDA7419 is not set
+# CONFIG_SND_SOC_TFA9879 is not set
+# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC31XX is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC3X is not set
+# CONFIG_SND_SOC_TS3A227E is not set
+# CONFIG_SND_SOC_TSCS42XX is not set
+# CONFIG_SND_SOC_TSCS454 is not set
+# CONFIG_SND_SOC_UDA1334 is not set
+# CONFIG_SND_SOC_WM8510 is not set
+# CONFIG_SND_SOC_WM8523 is not set
+# CONFIG_SND_SOC_WM8524 is not set
+# CONFIG_SND_SOC_WM8580 is not set
+# CONFIG_SND_SOC_WM8711 is not set
+# CONFIG_SND_SOC_WM8728 is not set
+# CONFIG_SND_SOC_WM8731 is not set
+# CONFIG_SND_SOC_WM8737 is not set
+# CONFIG_SND_SOC_WM8741 is not set
+# CONFIG_SND_SOC_WM8750 is not set
+# CONFIG_SND_SOC_WM8753 is not set
+# CONFIG_SND_SOC_WM8770 is not set
+# CONFIG_SND_SOC_WM8776 is not set
+# CONFIG_SND_SOC_WM8782 is not set
+# CONFIG_SND_SOC_WM8804_I2C is not set
+# CONFIG_SND_SOC_WM8804_SPI is not set
+# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8904 is not set
+# CONFIG_SND_SOC_WM8960 is not set
+# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
+# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_ZX_AUD96P22 is not set
+# CONFIG_SND_SOC_MAX9759 is not set
+# CONFIG_SND_SOC_MT6351 is not set
+# CONFIG_SND_SOC_MT6358 is not set
+# CONFIG_SND_SOC_NAU8540 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SOC_NAU8822 is not set
+# CONFIG_SND_SOC_NAU8824 is not set
+# CONFIG_SND_SOC_TPA6130A2 is not set
+# CONFIG_SND_SOC_AC107 is not set
+# CONFIG_SND_SOC_AC108 is not set
+# end of CODEC drivers
+
+CONFIG_SND_SIMPLE_CARD_UTILS=y
+# CONFIG_SND_SIMPLE_CARD is not set
+# CONFIG_SND_AUDIO_GRAPH_CARD is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_UHID is not set
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACCUTOUCH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_ASUS is not set
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_BETOP_FF is not set
+# CONFIG_HID_BIGBEN_FF is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CORSAIR is not set
+# CONFIG_HID_COUGAR is not set
+# CONFIG_HID_MACALLY is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_CMEDIA is not set
+# CONFIG_HID_CREATIVE_SB0540 is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELAN is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_ELO is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GEMBIRD is not set
+# CONFIG_HID_GFRM is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_GT683R is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_VIEWSONIC is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_ITE is not set
+# CONFIG_HID_JABRA is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LED is not set
+# CONFIG_HID_LENOVO is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MAGICMOUSE is not set
+# CONFIG_HID_MALTRON is not set
+# CONFIG_HID_MAYFLASH is not set
+# CONFIG_HID_REDRAGON is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NINTENDO is not set
+# CONFIG_HID_NTI is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PENMOUNT is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PLANTRONICS is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_RETRODE is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEAM is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_RMI is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_UDRAW_PS3 is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_XINMO is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+# CONFIG_HID_ALPS is not set
+# end of Special HID drivers
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+# end of USB HID support
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+# end of I2C HID support
+# end of HID support
+
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_LED_TRIG is not set
+# CONFIG_USB_ULPI_BUS is not set
+# CONFIG_USB_CONN_GPIO is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
+CONFIG_USB_AUTOSUSPEND_DELAY=2
+# CONFIG_USB_MON is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_EHCI_FSL is not set
+CONFIG_USB_EHCI_HCD_SUNXI=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_FOTG210_HCD is not set
+# CONFIG_USB_MAX3421_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_SUNXI=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_TEST_MODE is not set
+CONFIG_USB_SUNXI_HCD=y
+CONFIG_USB_SUNXI_HCI=y
+CONFIG_USB_SUNXI_EHCI0=y
+CONFIG_USB_SUNXI_EHCI1=y
+CONFIG_USB_SUNXI_OHCI0=y
+CONFIG_USB_SUNXI_OHCI1=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_REALTEK_AUTOPM=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_UAS=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USBIP_CORE is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_ISP1760 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_USB_HSIC_USB3503 is not set
+# CONFIG_USB_HSIC_USB4604 is not set
+# CONFIG_USB_LINK_LAYER_TEST is not set
+
+#
+# USB Physical Layer drivers
+#
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ISP1301 is not set
+# end of USB Physical Layer drivers
+
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+# CONFIG_U_SERIAL_CONSOLE is not set
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_GR_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_SNP_UDC_PLAT is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_NET2272 is not set
+CONFIG_USB_SUNXI_UDC0=y
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# end of USB Peripheral Controller
+
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_U_SERIAL=y
+CONFIG_USB_U_AUDIO=y
+CONFIG_USB_F_SERIAL=y
+CONFIG_USB_F_MASS_STORAGE=y
+CONFIG_USB_F_FS=y
+CONFIG_USB_F_UAC1=y
+CONFIG_USB_F_HID=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_SERIAL=y
+# CONFIG_USB_CONFIGFS_ACM is not set
+# CONFIG_USB_CONFIGFS_OBEX is not set
+# CONFIG_USB_CONFIGFS_NCM is not set
+# CONFIG_USB_CONFIGFS_ECM is not set
+# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set
+# CONFIG_USB_CONFIGFS_RNDIS is not set
+# CONFIG_USB_CONFIGFS_EEM is not set
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+CONFIG_USB_CONFIGFS_F_FS=y
+# CONFIG_USB_CONFIGFS_F_ACC is not set
+# CONFIG_USB_CONFIGFS_F_AUDIO_SRC is not set
+CONFIG_USB_CONFIGFS_F_UAC1=y
+# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+# CONFIG_USB_CONFIGFS_F_MIDI is not set
+CONFIG_USB_CONFIGFS_F_HID=y
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+CONFIG_USB_SUNXI_USB=y
+CONFIG_USB_SUNXI_USB_MANAGER=y
+CONFIG_USB_SUNXI_USB_DEBUG=y
+CONFIG_USB_SUNXI_USB_ADB=y
+# CONFIG_TYPEC is not set
+CONFIG_USB_ROLE_SWITCH=y
+CONFIG_MMC=y
+CONFIG_PWRSEQ_EMMC=y
+CONFIG_PWRSEQ_SIMPLE=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MMC_USDHI6ROL0 is not set
+CONFIG_MMC_SUNXI=y
+CONFIG_MMC_SUNXI_V4P1X=y
+CONFIG_MMC_SUNXI_V4P00X=y
+CONFIG_MMC_SUNXI_V4P10X=y
+CONFIG_MMC_SUNXI_V4P5X=y
+CONFIG_MMC_SUNXI_V5P3X=y
+# CONFIG_MMC_CQHCI is not set
+# CONFIG_MMC_HSQ is not set
+# CONFIG_MMC_MTK is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_CLASS_FLASH is not set
+# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_AN30259A is not set
+# CONFIG_LEDS_BCM6328 is not set
+# CONFIG_LEDS_BCM6358 is not set
+# CONFIG_LEDS_CR0014114 is not set
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3532 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_LM3692X is not set
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP3952 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_LP8860 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_TLC591XX is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_IS31FL319X is not set
+# CONFIG_LEDS_IS31FL32XX is not set
+
+#
+# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
+#
+# CONFIG_LEDS_BLINKM is not set
+# CONFIG_LEDS_MLXREG is not set
+# CONFIG_LEDS_USER is not set
+# CONFIG_LEDS_SPI_BYTE is not set
+# CONFIG_LEDS_TI_LMU_COMMON is not set
+CONFIG_LEDS_SUNXI=y
+# CONFIG_MATRIX_LEDS_SUNXI is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+# CONFIG_LEDS_TRIGGER_ONESHOT is not set
+# CONFIG_LEDS_TRIGGER_MTD is not set
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_CPU is not set
+# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
+# CONFIG_LEDS_TRIGGER_CAMERA is not set
+# CONFIG_LEDS_TRIGGER_PANIC is not set
+# CONFIG_LEDS_TRIGGER_NETDEV is not set
+# CONFIG_LEDS_TRIGGER_PATTERN is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_EDAC_SUPPORT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+CONFIG_RTC_NVMEM=y
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABEOZ9 is not set
+# CONFIG_RTC_DRV_ABX80X is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_HYM8563 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_ISL12026 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF85063 is not set
+# CONFIG_RTC_DRV_PCF85363 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8010 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3028 is not set
+# CONFIG_RTC_DRV_RV8803 is not set
+# CONFIG_RTC_DRV_SD3078 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1302 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1343 is not set
+# CONFIG_RTC_DRV_DS1347 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6916 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_RX6110 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_MCP795 is not set
+CONFIG_RTC_I2C_AND_SPI=y
+
+#
+# SPI and I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_PCF2127 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_ZYNQMP is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SUN6I is not set
+CONFIG_RTC_DRV_SUNXI=y
+CONFIG_SUNXI_REBOOT_FLAG=y
+CONFIG_SUNXI_RTC_BOOTCOUNT=y
+CONFIG_SUNXI_RTC_POWEROFF_ALARM=y
+# CONFIG_RTC_DRV_CADENCE is not set
+# CONFIG_RTC_DRV_FTRTC010 is not set
+# CONFIG_RTC_DRV_SNVS is not set
+# CONFIG_RTC_DRV_R7301 is not set
+
+#
+# HID Sensor RTC drivers
+#
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_OF=y
+# CONFIG_ALTERA_MSGDMA is not set
+CONFIG_DMA_SUN6I=y
+# CONFIG_DW_AXI_DMAC is not set
+# CONFIG_FSL_EDMA is not set
+# CONFIG_INTEL_IDMA64 is not set
+# CONFIG_QCOM_HIDMA_MGMT is not set
+# CONFIG_QCOM_HIDMA is not set
+# CONFIG_DW_DMAC is not set
+
+#
+# DMA Clients
+#
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+
+#
+# DMABUF options
+#
+CONFIG_SYNC_FILE=y
+# CONFIG_SW_SYNC is not set
+# CONFIG_UDMABUF is not set
+# CONFIG_DMABUF_SELFTESTS is not set
+# end of DMABUF options
+
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_VFIO is not set
+# CONFIG_VIRT_DRIVERS is not set
+CONFIG_VIRTIO=y
+# CONFIG_VIRTIO_MENU is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+# end of Microsoft Hyper-V guest support
+
+# CONFIG_GREYBUS is not set
+CONFIG_STAGING=y
+# CONFIG_PRISM2_USB is not set
+# CONFIG_COMEDI is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_RTL8723BS is not set
+# CONFIG_R8712U is not set
+# CONFIG_R8188EU is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16240 is not set
+# end of Accelerometers
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_AD7280 is not set
+# end of Analog to digital converters
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+# end of Analog digital bi-direction converters
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7746 is not set
+# end of Capacitance to digital converters
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# end of Direct Digital Synthesis
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+# end of Network Analyzer, Impedance Converters
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7854 is not set
+# end of Active energy metering IC
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S1210 is not set
+# end of Resolver to digital converters
+# end of IIO staging drivers
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# end of Speakup console speech
+
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+# CONFIG_ASHMEM is not set
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+CONFIG_ION_CMA_HEAP=y
+# end of Android
+
+# CONFIG_STAGING_BOARD is not set
+# CONFIG_LTE_GDM724X is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_UNISYSSPAR is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+# CONFIG_FB_TFT is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
+# CONFIG_MOST is not set
+# CONFIG_KS7010 is not set
+# CONFIG_PI433 is not set
+
+#
+# Gasket devices
+#
+# end of Gasket devices
+
+# CONFIG_XIL_AXIS_FIFO is not set
+# CONFIG_FIELDBUS_DEV is not set
+# CONFIG_USB_WUSB_CBAF is not set
+# CONFIG_UWB is not set
+# CONFIG_EXFAT_FS is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+# CONFIG_COMMON_CLK_DEBUG is not set
+# CONFIG_CLK_HSDK is not set
+# CONFIG_COMMON_CLK_MAX9485 is not set
+# CONFIG_COMMON_CLK_SI5341 is not set
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI514 is not set
+# CONFIG_COMMON_CLK_SI544 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
+# CONFIG_COMMON_CLK_PWM is not set
+# CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
+# CONFIG_CLK_SIFIVE is not set
+# CONFIG_CLK_SUNXI is not set
+CONFIG_SUNXI_CCU=y
+CONFIG_SUN8IW20_CCU=y
+CONFIG_SUN8IW20_R_CCU=y
+# CONFIG_SUN8I_A83T_CCU is not set
+# CONFIG_SUN8I_DE2_CCU is not set
+# CONFIG_SUN8I_R_CCU is not set
+CONFIG_SUNXI_RTC_CCU=y
+# end of Common Clock Framework
+
+# CONFIG_HWSPINLOCK is not set
+# CONFIG_HWSPINLOCK_SUNXI is not set
+
+#
+# Clock Source drivers
+#
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_SUN4I_TIMER=y
+# CONFIG_SUN50I_TIMER is not set
+# CONFIG_SUNXI_TIMER is not set
+# CONFIG_SUNXI_TIMER_TEST is not set
+# CONFIG_MTK_TIMER is not set
+CONFIG_RISCV_TIMER=y
+# end of Clock Source drivers
+
+# CONFIG_MAILBOX is not set
+CONFIG_IOMMU_IOVA=y
+CONFIG_IOMMU_API=y
+# CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT is not set
+CONFIG_IOMMU_SUPPORT=y
+
+#
+# Generic IOMMU Pagetable Support
+#
+# end of Generic IOMMU Pagetable Support
+
+# CONFIG_IOMMU_DEBUGFS is not set
+# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
+CONFIG_OF_IOMMU=y
+CONFIG_IOMMU_DMA=y
+CONFIG_SUNXI_IOMMU=y
+CONFIG_SUNXI_IOMMU_DEBUG=y
+# CONFIG_SUNXI_IOMMU_TESTS is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_REMOTEPROC is not set
+# end of Remoteproc drivers
+
+#
+# Rpmsg drivers
+#
+CONFIG_RPMSG=y
+# CONFIG_RPMSG_CHAR is not set
+CONFIG_RPMSG_SUNXI_AMP=y
+CONFIG_RPMSG_VIRTIO=y
+# end of Rpmsg drivers
+
+# CONFIG_SOUNDWIRE is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+
+#
+# Amlogic SoC drivers
+#
+# end of Amlogic SoC drivers
+
+#
+# Aspeed SoC drivers
+#
+# end of Aspeed SoC drivers
+
+#
+# Broadcom SoC drivers
+#
+# end of Broadcom SoC drivers
+
+#
+# NXP/Freescale QorIQ SoC drivers
+#
+# end of NXP/Freescale QorIQ SoC drivers
+
+#
+# i.MX SoC drivers
+#
+# end of i.MX SoC drivers
+
+#
+# Qualcomm SoC drivers
+#
+# end of Qualcomm SoC drivers
+
+# CONFIG_SUNXI_SRAM is not set
+CONFIG_SUNXI_SID=y
+CONFIG_SUNXI_RISCV_SUSPEND=y
+# CONFIG_SOC_TI is not set
+
+#
+# Xilinx SoC drivers
+#
+# CONFIG_XILINX_VCU is not set
+# end of Xilinx SoC drivers
+# end of SOC (System On Chip) specific Drivers
+
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+CONFIG_IIO=y
+# CONFIG_IIO_BUFFER is not set
+# CONFIG_IIO_CONFIGFS is not set
+# CONFIG_IIO_TRIGGER is not set
+# CONFIG_IIO_SW_DEVICE is not set
+# CONFIG_IIO_SW_TRIGGER is not set
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADXL345_I2C is not set
+# CONFIG_ADXL345_SPI is not set
+# CONFIG_ADXL372_SPI is not set
+# CONFIG_ADXL372_I2C is not set
+# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
+# CONFIG_BMC150_ACCEL is not set
+# CONFIG_DA280 is not set
+# CONFIG_DA311 is not set
+# CONFIG_DMARD06 is not set
+# CONFIG_DMARD09 is not set
+# CONFIG_DMARD10 is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+# CONFIG_KXSD9 is not set
+# CONFIG_KXCJK1013 is not set
+# CONFIG_MC3230 is not set
+# CONFIG_MMA7455_I2C is not set
+# CONFIG_MMA7455_SPI is not set
+# CONFIG_MMA7660 is not set
+# CONFIG_MMA8452 is not set
+# CONFIG_MMA9551 is not set
+# CONFIG_MMA9553 is not set
+# CONFIG_MXC4005 is not set
+# CONFIG_MXC6255 is not set
+# CONFIG_SCA3000 is not set
+# CONFIG_STK8312 is not set
+# CONFIG_STK8BA50 is not set
+# end of Accelerometers
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7124 is not set
+# CONFIG_AD7266 is not set
+# CONFIG_AD7291 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7606_IFACE_PARALLEL is not set
+# CONFIG_AD7606_IFACE_SPI is not set
+# CONFIG_AD7766 is not set
+# CONFIG_AD7768_1 is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_AD7923 is not set
+# CONFIG_AD7949 is not set
+# CONFIG_AD799X is not set
+CONFIG_AXP20X_ADC=y
+# CONFIG_AXP288_ADC is not set
+# CONFIG_CC10001_ADC is not set
+# CONFIG_ENVELOPE_DETECTOR is not set
+# CONFIG_HI8435 is not set
+# CONFIG_HX711 is not set
+# CONFIG_INA2XX_ADC is not set
+# CONFIG_LTC2471 is not set
+# CONFIG_LTC2485 is not set
+# CONFIG_LTC2497 is not set
+# CONFIG_MAX1027 is not set
+# CONFIG_MAX11100 is not set
+# CONFIG_MAX1118 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_MAX9611 is not set
+# CONFIG_MCP320X is not set
+# CONFIG_MCP3422 is not set
+# CONFIG_MCP3911 is not set
+# CONFIG_NAU7802 is not set
+# CONFIG_SD_ADC_MODULATOR is not set
+# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC0832 is not set
+# CONFIG_TI_ADC084S021 is not set
+# CONFIG_TI_ADC12138 is not set
+# CONFIG_TI_ADC108S102 is not set
+# CONFIG_TI_ADC128S052 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_TI_ADS1015 is not set
+# CONFIG_TI_ADS7950 is not set
+# CONFIG_TI_ADS8344 is not set
+# CONFIG_TI_ADS8688 is not set
+# CONFIG_TI_ADS124S08 is not set
+# CONFIG_TI_TLC4541 is not set
+# CONFIG_VF610_ADC is not set
+# CONFIG_XILINX_XADC is not set
+# end of Analog to digital converters
+
+#
+# Analog Front Ends
+#
+# CONFIG_IIO_RESCALE is not set
+# end of Analog Front Ends
+
+#
+# Amplifiers
+#
+# CONFIG_AD8366 is not set
+# end of Amplifiers
+
+#
+# Chemical Sensors
+#
+# CONFIG_ATLAS_PH_SENSOR is not set
+# CONFIG_BME680 is not set
+# CONFIG_CCS811 is not set
+# CONFIG_IAQCORE is not set
+# CONFIG_SENSIRION_SGP30 is not set
+# CONFIG_SPS30 is not set
+# CONFIG_VZ89X is not set
+# end of Chemical Sensors
+
+#
+# Hid Sensor IIO Common
+#
+# end of Hid Sensor IIO Common
+
+#
+# SSP Sensor Common
+#
+# CONFIG_IIO_SSP_SENSORHUB is not set
+# end of SSP Sensor Common
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5592R is not set
+# CONFIG_AD5593R is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_LTC1660 is not set
+# CONFIG_LTC2632 is not set
+# CONFIG_AD5686_SPI is not set
+# CONFIG_AD5696_I2C is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5758 is not set
+# CONFIG_AD5761 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD7303 is not set
+# CONFIG_AD8801 is not set
+# CONFIG_DPOT_DAC is not set
+# CONFIG_DS4424 is not set
+# CONFIG_M62332 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MAX5821 is not set
+# CONFIG_MCP4725 is not set
+# CONFIG_MCP4922 is not set
+# CONFIG_TI_DAC082S085 is not set
+# CONFIG_TI_DAC5571 is not set
+# CONFIG_TI_DAC7311 is not set
+# CONFIG_TI_DAC7612 is not set
+# CONFIG_VF610_DAC is not set
+# end of Digital to analog converters
+
+#
+# IIO dummy driver
+#
+# end of IIO dummy driver
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+# CONFIG_AD9523 is not set
+# end of Clock Generator/Distribution
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+# CONFIG_ADF4350 is not set
+# CONFIG_ADF4371 is not set
+# end of Phase-Locked Loop (PLL) frequency synthesizers
+# end of Frequency Synthesizers DDS/PLL
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADIS16260 is not set
+# CONFIG_ADXRS450 is not set
+# CONFIG_BMG160 is not set
+# CONFIG_FXAS21002C is not set
+# CONFIG_MPU3050_I2C is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_ITG3200 is not set
+# end of Digital gyroscope sensors
+
+#
+# Health Sensors
+#
+
+#
+# Heart Rate Monitors
+#
+# CONFIG_AFE4403 is not set
+# CONFIG_AFE4404 is not set
+# CONFIG_MAX30100 is not set
+# CONFIG_MAX30102 is not set
+# end of Heart Rate Monitors
+# end of Health Sensors
+
+#
+# Humidity sensors
+#
+# CONFIG_AM2315 is not set
+# CONFIG_DHT11 is not set
+# CONFIG_HDC100X is not set
+# CONFIG_HTS221 is not set
+# CONFIG_HTU21 is not set
+# CONFIG_SI7005 is not set
+# CONFIG_SI7020 is not set
+# end of Humidity sensors
+
+#
+# Inertial measurement units
+#
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16460 is not set
+# CONFIG_ADIS16480 is not set
+# CONFIG_BMI160_I2C is not set
+# CONFIG_BMI160_SPI is not set
+# CONFIG_KMX61 is not set
+# CONFIG_INV_MPU6050_I2C is not set
+# CONFIG_INV_MPU6050_SPI is not set
+# CONFIG_IIO_ST_LSM6DSX is not set
+# end of Inertial measurement units
+
+#
+# Light sensors
+#
+# CONFIG_ADJD_S311 is not set
+# CONFIG_AL3320A is not set
+# CONFIG_APDS9300 is not set
+# CONFIG_APDS9960 is not set
+# CONFIG_BH1750 is not set
+# CONFIG_BH1780 is not set
+# CONFIG_CM32181 is not set
+# CONFIG_CM3232 is not set
+# CONFIG_CM3323 is not set
+# CONFIG_CM3605 is not set
+# CONFIG_CM36651 is not set
+# CONFIG_GP2AP020A00F is not set
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_ISL29125 is not set
+# CONFIG_JSA1212 is not set
+# CONFIG_RPR0521 is not set
+# CONFIG_LTR501 is not set
+# CONFIG_LV0104CS is not set
+# CONFIG_MAX44000 is not set
+# CONFIG_MAX44009 is not set
+# CONFIG_NOA1305 is not set
+# CONFIG_OPT3001 is not set
+# CONFIG_PA12203001 is not set
+# CONFIG_SI1133 is not set
+# CONFIG_SI1145 is not set
+# CONFIG_STK3310 is not set
+# CONFIG_ST_UVIS25 is not set
+# CONFIG_TCS3414 is not set
+# CONFIG_TCS3472 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2772 is not set
+# CONFIG_TSL4531 is not set
+# CONFIG_US5182D is not set
+# CONFIG_VCNL4000 is not set
+# CONFIG_VCNL4035 is not set
+# CONFIG_VEML6070 is not set
+# CONFIG_VL6180 is not set
+# CONFIG_ZOPT2201 is not set
+# end of Light sensors
+
+#
+# Magnetometer sensors
+#
+# CONFIG_AK8974 is not set
+# CONFIG_AK8975 is not set
+# CONFIG_AK09911 is not set
+# CONFIG_BMC150_MAGN_I2C is not set
+# CONFIG_BMC150_MAGN_SPI is not set
+# CONFIG_MAG3110 is not set
+# CONFIG_MMC35240 is not set
+# CONFIG_IIO_ST_MAGN_3AXIS is not set
+# CONFIG_SENSORS_HMC5843_I2C is not set
+# CONFIG_SENSORS_HMC5843_SPI is not set
+# CONFIG_SENSORS_RM3100_I2C is not set
+# CONFIG_SENSORS_RM3100_SPI is not set
+# end of Magnetometer sensors
+
+#
+# Multiplexers
+#
+# CONFIG_IIO_MUX is not set
+# end of Multiplexers
+
+#
+# Inclinometer sensors
+#
+# end of Inclinometer sensors
+
+#
+# Digital potentiometers
+#
+# CONFIG_AD5272 is not set
+# CONFIG_DS1803 is not set
+# CONFIG_MAX5432 is not set
+# CONFIG_MAX5481 is not set
+# CONFIG_MAX5487 is not set
+# CONFIG_MCP4018 is not set
+# CONFIG_MCP4131 is not set
+# CONFIG_MCP4531 is not set
+# CONFIG_MCP41010 is not set
+# CONFIG_TPL0102 is not set
+# end of Digital potentiometers
+
+#
+# Digital potentiostats
+#
+# CONFIG_LMP91000 is not set
+# end of Digital potentiostats
+
+#
+# Pressure sensors
+#
+# CONFIG_ABP060MG is not set
+# CONFIG_BMP280 is not set
+# CONFIG_DPS310 is not set
+# CONFIG_HP03 is not set
+# CONFIG_MPL115_I2C is not set
+# CONFIG_MPL115_SPI is not set
+# CONFIG_MPL3115 is not set
+# CONFIG_MS5611 is not set
+# CONFIG_MS5637 is not set
+# CONFIG_IIO_ST_PRESS is not set
+# CONFIG_T5403 is not set
+# CONFIG_HP206C is not set
+# CONFIG_ZPA2326 is not set
+# end of Pressure sensors
+
+#
+# Lightning sensors
+#
+# CONFIG_AS3935 is not set
+# end of Lightning sensors
+
+#
+# Proximity and distance sensors
+#
+# CONFIG_ISL29501 is not set
+# CONFIG_LIDAR_LITE_V2 is not set
+# CONFIG_MB1232 is not set
+# CONFIG_RFD77402 is not set
+# CONFIG_SRF04 is not set
+# CONFIG_SX9500 is not set
+# CONFIG_SRF08 is not set
+# CONFIG_VL53L0X_I2C is not set
+# end of Proximity and distance sensors
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S90 is not set
+# CONFIG_AD2S1200 is not set
+# end of Resolver to digital converters
+
+#
+# Temperature sensors
+#
+# CONFIG_MAXIM_THERMOCOUPLE is not set
+# CONFIG_MLX90614 is not set
+# CONFIG_MLX90632 is not set
+# CONFIG_TMP006 is not set
+# CONFIG_TMP007 is not set
+# CONFIG_TSYS01 is not set
+# CONFIG_TSYS02D is not set
+# CONFIG_MAX31856 is not set
+# end of Temperature sensors
+
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+# CONFIG_PWM_FSL_FTM is not set
+# CONFIG_PWM_PCA9685 is not set
+# CONFIG_PWM_SIFIVE is not set
+# CONFIG_PWM_SUN4I is not set
+CONFIG_PWM_SUNXI_GROUP=y
+
+#
+# IRQ chip support
+#
+CONFIG_IRQCHIP=y
+# CONFIG_AL_FIC is not set
+CONFIG_SIFIVE_PLIC=y
+# CONFIG_SUNXI_WAKEUPGEN is not set
+# CONFIG_SUN8I_NMI is not set
+# end of IRQ chip support
+
+# CONFIG_IPACK_BUS is not set
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_SIMPLE=y
+CONFIG_RESET_SUNXI=y
+# CONFIG_RESET_TI_SYSCON is not set
+
+#
+# PHY Subsystem
+#
+# CONFIG_GENERIC_PHY is not set
+# CONFIG_PHY_SUN6I_MIPI_DPHY is not set
+# CONFIG_PHY_SUN9I_USB is not set
+# CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
+# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
+# CONFIG_PHY_PXA_28NM_HSIC is not set
+# CONFIG_PHY_PXA_28NM_USB2 is not set
+# CONFIG_PHY_CPCAP_USB is not set
+# CONFIG_PHY_MAPPHONE_MDM6600 is not set
+# end of PHY Subsystem
+
+# CONFIG_POWERCAP is not set
+# CONFIG_MCB is not set
+# CONFIG_RAS is not set
+
+#
+# Android
+#
+CONFIG_ANDROID=y
+# CONFIG_ANDROID_BINDER_IPC is not set
+# end of Android
+
+# CONFIG_LIBNVDIMM is not set
+# CONFIG_DAX is not set
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_NVMEM_SUNXI_SID=y
+
+#
+# HW tracing support
+#
+# CONFIG_STM is not set
+# CONFIG_INTEL_TH is not set
+# end of HW tracing support
+
+# CONFIG_FPGA is not set
+# CONFIG_FSI is not set
+# CONFIG_SIOX is not set
+# CONFIG_SLIMBUS is not set
+# CONFIG_INTERCONNECT is not set
+# CONFIG_COUNTER is not set
+# end of Device Drivers
+
+#
+# File systems
+#
+# CONFIG_VALIDATE_FS_PARSER is not set
+CONFIG_FS_IOMAP=y
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_USE_FOR_EXT2=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_FS_DAX is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+# CONFIG_EXPORTFS_BLOCK_OPS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_MANDATORY_FILE_LOCKING=y
+# CONFIG_FS_ENCRYPTION is not set
+# CONFIG_FS_VERITY is not set
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_FUSE_FS=m
+# CONFIG_CUSE is not set
+# CONFIG_VIRTIO_FS is not set
+CONFIG_OVERLAY_FS=y
+# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
+CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
+# CONFIG_OVERLAY_FS_INDEX is not set
+# CONFIG_OVERLAY_FS_XINO_AUTO is not set
+# CONFIG_OVERLAY_FS_METACOPY is not set
+# CONFIG_INCREMENTAL_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+# end of Caches
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+# end of CD-ROM/DVD Filesystems
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
+# CONFIG_NTFS_FS is not set
+# end of DOS/FAT/NT Filesystems
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_PROC_CHILDREN=y
+CONFIG_KERNFS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLBFS is not set
+CONFIG_MEMFD_CREATE=y
+CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
+CONFIG_CONFIGFS_FS=y
+# end of Pseudo filesystems
+
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ORANGEFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UBIFS_FS_ZSTD=y
+# CONFIG_UBIFS_ATIME_SUPPORT is not set
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_SECURITY=y
+# CONFIG_UBIFS_FS_AUTHENTICATION is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+# CONFIG_SQUASHFS_FILE_CACHE is not set
+CONFIG_SQUASHFS_FILE_DIRECT=y
+# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+# CONFIG_SQUASHFS_XATTR is not set
+# CONFIG_SQUASHFS_ZLIB is not set
+# CONFIG_SQUASHFS_LZ4 is not set
+# CONFIG_SQUASHFS_LZO is not set
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_ZSTD is not set
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_EROFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+# CONFIG_UNICODE is not set
+# end of File systems
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_KEYS_REQUEST_CACHE is not set
+# CONFIG_PERSISTENT_KEYRINGS is not set
+# CONFIG_BIG_KEYS is not set
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEY_DH_OPERATIONS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+# CONFIG_HARDENED_USERCOPY is not set
+# CONFIG_STATIC_USERMODEHELPER is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
+
+#
+# Kernel hardening options
+#
+
+#
+# Memory initialization
+#
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
+# end of Memory initialization
+# end of Kernel hardening options
+# end of Security options
+
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_AKCIPHER=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_KPP=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_NULL2=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_ENGINE=y
+
+#
+# Public-key cryptography
+#
+CONFIG_CRYPTO_RSA=y
+# CONFIG_CRYPTO_DH is not set
+CONFIG_CRYPTO_ECC=y
+CONFIG_CRYPTO_ECDH=y
+# CONFIG_CRYPTO_ECRDSA is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
+# CONFIG_CRYPTO_AEGIS128 is not set
+# CONFIG_CRYPTO_SEQIV is not set
+# CONFIG_CRYPTO_ECHAINIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CFB is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_OFB is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_KEYWRAP is not set
+# CONFIG_CRYPTO_ADIANTUM is not set
+# CONFIG_CRYPTO_ESSIV is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_XXHASH is not set
+# CONFIG_CRYPTO_CRCT10DIF is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_POLY1305 is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_SHA3 is not set
+# CONFIG_CRYPTO_SM3 is not set
+# CONFIG_CRYPTO_STREEBOG is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_LIB_AES=y
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_AES_TI is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_LIB_ARC4=y
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_CHACHA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_SM4 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_842 is not set
+# CONFIG_CRYPTO_LZ4 is not set
+# CONFIG_CRYPTO_LZ4HC is not set
+CONFIG_CRYPTO_ZSTD=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+# CONFIG_CRYPTO_DRBG_HASH is not set
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_USER_API_RNG is not set
+# CONFIG_CRYPTO_USER_API_AEAD is not set
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
+# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
+# CONFIG_CRYPTO_DEV_SUNXI is not set
+CONFIG_CRYPTO_DEV_VIRTIO=y
+# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
+# CONFIG_CRYPTO_DEV_CCREE is not set
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
+CONFIG_PKCS7_MESSAGE_PARSER=y
+# CONFIG_PKCS7_TEST_KEY is not set
+# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
+
+#
+# Certificates for signature checking
+#
+CONFIG_SYSTEM_TRUSTED_KEYRING=y
+CONFIG_SYSTEM_TRUSTED_KEYS=""
+# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
+# CONFIG_SECONDARY_TRUSTED_KEYRING is not set
+# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
+# end of Certificates for signature checking
+
+#
+# Library routines
+#
+# CONFIG_PACKING is not set
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+# CONFIG_CORDIC is not set
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC64 is not set
+# CONFIG_CRC4 is not set
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+# CONFIG_CRC8 is not set
+CONFIG_XXHASH=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAS_DMA=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
+CONFIG_DMA_DECLARE_COHERENT=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_DMA_REMAP=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_CMA=y
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_SGL_ALLOC=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_CLZ_TAB=y
+# CONFIG_IRQ_POLL is not set
+CONFIG_MPILIB=y
+CONFIG_LIBFDT=y
+CONFIG_OID_REGISTRY=y
+CONFIG_FONT_SUPPORT=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_SG_POOL=y
+CONFIG_SBITMAP=y
+# CONFIG_STRING_SELFTEST is not set
+# end of Library routines
+
+#
+# Kernel hacking
+#
+
+#
+# printk and dmesg options
+#
+CONFIG_PRINTK_TIME=y
+# CONFIG_PRINTK_CALLER is not set
+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
+CONFIG_CONSOLE_LOGLEVEL_QUIET=4
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DYNAMIC_DEBUG_CORE is not set
+# end of printk and dmesg options
+
+#
+# Compile-time checks and compiler options
+#
+# CONFIG_DEBUG_INFO is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_INSTALL is not set
+CONFIG_OPTIMIZE_INLINING=y
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# end of Compile-time checks and compiler options
+
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_MISC=y
+
+#
+# Memory Debugging
+#
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_PAGE_OWNER is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_KASAN_STACK=1
+# end of Memory Debugging
+
+CONFIG_CC_HAS_SANCOV_TRACE_PC=y
+# CONFIG_DEBUG_SHIRQ is not set
+
+#
+# Debug Lockups and Hangs
+#
+# CONFIG_SOFTLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_WQ_WATCHDOG is not set
+# end of Debug Lockups and Hangs
+
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_SCHED_STACK_END_CHECK is not set
+# CONFIG_DEBUG_TIMEKEEPING is not set
+CONFIG_DEBUG_PREEMPT=y
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_RWSEMS is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+# CONFIG_WW_MUTEX_SELFTEST is not set
+# end of Lock Debugging (spinlocks, mutexes, etc...)
+
+CONFIG_STACKTRACE=y
+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_PLIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_RCU_PERF_TEST is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RCU_EQS_DEBUG is not set
+# end of RCU Debugging
+
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+CONFIG_RUNTIME_TESTING_MENU=y
+# CONFIG_LKDTM is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_TEST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_REED_SOLOMON_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_PERCPU_TEST is not set
+CONFIG_ATOMIC64_SELFTEST=y
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_STRSCPY is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_BITFIELD is not set
+# CONFIG_TEST_UUID is not set
+# CONFIG_TEST_XARRAY is not set
+# CONFIG_TEST_OVERFLOW is not set
+# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_HASH is not set
+# CONFIG_TEST_IDA is not set
+# CONFIG_TEST_LKM is not set
+# CONFIG_TEST_VMALLOC is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_TEST_BLACKHOLE_DEV is not set
+# CONFIG_FIND_BIT_BENCHMARK is not set
+# CONFIG_TEST_FIRMWARE is not set
+# CONFIG_TEST_SYSCTL is not set
+# CONFIG_TEST_UDELAY is not set
+# CONFIG_TEST_STATIC_KEYS is not set
+# CONFIG_TEST_KMOD is not set
+# CONFIG_TEST_MEMCAT_P is not set
+# CONFIG_TEST_STACKINIT is not set
+# CONFIG_TEST_MEMINIT is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_BUG_ON_DATA_CORRUPTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_UBSAN is not set
+CONFIG_UBSAN_ALIGNMENT=y
+# end of Kernel hacking

+ 13 - 0
Code/patch/d1/disp.patch

@@ -0,0 +1,13 @@
+diff --git a/drivers/video/fbdev/sunxi/disp2/disp/dev_fb.c b/drivers/video/fbdev/sunxi/disp2/disp/dev_fb.c
+index 25d29c353..b2da2c6bc 100644
+--- a/drivers/video/fbdev/sunxi/disp2/disp/dev_fb.c
++++ b/drivers/video/fbdev/sunxi/disp2/disp/dev_fb.c
+@@ -2095,7 +2095,7 @@ static s32 display_fb_request(u32 fb_id, struct disp_fb_create_info *fb_para)
+ 
+ 			config.info.mode = LAYER_MODE_BUFFER;
+ 			config.info.zorder = 16;
+-			config.info.alpha_mode = 0;
++			config.info.alpha_mode = 1;
+ 			config.info.alpha_value = 0xff;
+ 			config.info.fb.crop.x = (0LL) << 32;
+ 			config.info.fb.crop.y = ((long long)y_offset) << 32;

+ 82 - 0
Code/patch/d1/power.patch

@@ -0,0 +1,82 @@
+diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
+index aa59496e4..45b09ce38 100644
+--- a/drivers/mfd/axp20x.c
++++ b/drivers/mfd/axp20x.c
+@@ -976,6 +976,7 @@ int axp20x_device_probe(struct axp20x_dev *axp20x)
+ 		return ret;
+ 	}
+ 
++	pm_power_off = 0;
+ 	if (!pm_power_off) {
+ 		axp20x_pm_power_off = axp20x;
+ 		pm_power_off = axp20x_power_off;
+diff --git a/drivers/power/supply/axp20x_ac_power.c b/drivers/power/supply/axp20x_ac_power.c
+index f74b0556b..3314f015f 100644
+--- a/drivers/power/supply/axp20x_ac_power.c
++++ b/drivers/power/supply/axp20x_ac_power.c
+@@ -49,6 +49,9 @@ static irqreturn_t axp20x_ac_power_irq(int irq, void *devid)
+ {
+ 	struct axp20x_ac_power *power = devid;
+ 
++	regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x00);
++	regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x03);
++
+ 	power_supply_changed(power->supply);
+ 
+ 	return IRQ_HANDLED;
+diff --git a/drivers/power/supply/axp20x_battery.c b/drivers/power/supply/axp20x_battery.c
+index ee86ae3d2..577ee4bbd 100755
+--- a/drivers/power/supply/axp20x_battery.c
++++ b/drivers/power/supply/axp20x_battery.c
+@@ -326,6 +326,42 @@ static int axp20x_battery_get_prop(struct power_supply *psy,
+ 		val->intval *= 1000;
+ 		break;
+ 
++	case POWER_SUPPLY_PROP_ENERGY_FULL:
++	case POWER_SUPPLY_PROP_ENERGY_NOW:
++		/* When no battery is present, return 0 */
++		ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_OP_MODE,
++				  &reg);
++		if (ret)
++			return ret;
++
++		if (!(reg & AXP20X_PWR_OP_BATT_PRESENT)) {
++			val->intval = 0;
++			return 0;
++		}
++
++		if(psp == POWER_SUPPLY_PROP_ENERGY_FULL) {
++			val->intval = 8000000;
++			return 0;
++		}
++
++		ret = regmap_read(axp20x_batt->regmap, AXP20X_FG_RES, &reg);
++		if (ret)
++			return ret;
++
++		if (axp20x_batt->data->has_fg_valid && !(reg & AXP22X_FG_VALID))
++			return -EINVAL;
++
++		val1 = reg & AXP209_FG_PERCENT;
++		if (val1 > 90)
++			val1= 80;
++		else if (val1 < 10)
++			val1 = 0;
++		else
++			val1 -= 10;
++
++		val->intval = val1 * 100000;
++		break;
++
+ 	default:
+ 		return -EINVAL;
+ 	}
+@@ -486,6 +522,8 @@ static enum power_supply_property axp20x_battery_props[] = {
+ 	POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+ 	POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+ 	POWER_SUPPLY_PROP_CAPACITY,
++	POWER_SUPPLY_PROP_ENERGY_FULL,
++	POWER_SUPPLY_PROP_ENERGY_NOW,
+ };
+ 
+ static int axp20x_battery_prop_writeable(struct power_supply *psy,

+ 91 - 0
Code/patch/d1/sound.patch

@@ -0,0 +1,91 @@
+diff --git a/sound/soc/sunxi/sun20iw1-codec.c b/sound/soc/sunxi/sun20iw1-codec.c
+index 84f92e5ee..f5015d1e9 100755
+--- a/sound/soc/sunxi/sun20iw1-codec.c
++++ b/sound/soc/sunxi/sun20iw1-codec.c
+@@ -46,7 +46,7 @@
+ 
+ #define LOG_ERR(fmt, arg...)	pr_err("[AUDIOCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+ #define LOG_WARN(fmt, arg...)	pr_warn("[AUDIOCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+-#define LOG_INFO(fmt, arg...)	pr_info("[AUDIOCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
++#define LOG_INFO(fmt, arg...)	{}	//pr_info("[AUDIOCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+ 
+ /* digital audio process function */
+ enum sunxi_hw_dap {
+@@ -797,8 +797,8 @@ static int sunxi_codec_playback_event(struct snd_soc_dapm_widget *w,
+ 				(0x1<<EN_DAC), (0x0<<EN_DAC));
+ 		/* DACL to left channel LINEOUT Mute control 0:mute 1: not mute */
+ 		snd_soc_component_update_bits(component, SUNXI_DAC_REG,
+-				(0x1 << DACLMUTE) | (0x1 << DACRMUTE),
+-				(0x0 << DACLMUTE) | (0x0 << DACRMUTE));
++				(0x1 << DACLMUTE) | (0x0 << DACRMUTE),
++				(0x1 << DACLMUTE) | (0x0 << DACRMUTE));
+ 		break;
+ 	default:
+ 		break;
+@@ -1004,7 +1004,7 @@ static const struct snd_kcontrol_new sunxi_codec_controls[] = {
+ 		       LINEOUT_VOL, 0x1F, 0, lineout_tlv),
+ 	/* Headphone Gain */
+ 	SOC_SINGLE_TLV("Headphone Volume", SUNXI_HP2_REG,
+-		       HEADPHONE_GAIN, 0x7, 0, headphone_gain_tlv),
++		       HEADPHONE_GAIN, 0x7, 1, headphone_gain_tlv),
+ };
+ 
+ /* lineout controls */
+@@ -1063,6 +1063,7 @@ static const struct snd_kcontrol_new adc3_input_mixer[] = {
+ 
+ /*audio dapm widget */
+ static const struct snd_soc_dapm_widget sunxi_codec_dapm_widgets[] = {
++#if 0
+ 	SND_SOC_DAPM_AIF_IN_E("DACL", "Playback", 0, SUNXI_DAC_REG,
+ 				DACLEN, 0,
+ 				sunxi_codec_playback_event,
+@@ -1072,7 +1073,7 @@ static const struct snd_soc_dapm_widget sunxi_codec_dapm_widgets[] = {
+ 				DACREN, 0,
+ 				sunxi_codec_playback_event,
+ 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+-
++#endif
+ 	SND_SOC_DAPM_AIF_OUT_E("ADC1", "Capture", 0, SND_SOC_NOPM, 0, 0,
+ 			       sunxi_codec_adc1_event,
+ 			       SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+@@ -1263,6 +1264,19 @@ static void sunxi_codec_init(struct snd_soc_component *component)
+ 	if (sunxi_codec->hw_config.dachpf_cfg)
+ 		dachpf_config(component);
+ #endif
++
++	snd_soc_component_update_bits(component, SUNXI_DAC_DPC,
++			(0x1<<EN_DAC), (0x1<<EN_DAC));
++	snd_soc_component_update_bits(component, SUNXI_DAC_REG,
++			(0x1 << DACLEN) | (0x1 << DACREN) | (0x1 << DACLMUTE) | (0x1 << DACRMUTE),
++			(0x1 << DACLEN) | (0x1 << DACREN) | (0x1 << DACLMUTE) | (0x1 << DACRMUTE));
++	snd_soc_component_update_bits(component, SUNXI_RAMP_REG,
++			(0x1 << RMC_EN), (0x1 << RMC_EN));
++	snd_soc_component_update_bits(component, SUNXI_HP2_REG,
++			(0x1 << HP_DRVEN) | (0x1 << HP_DRVOUTEN) | (0x1 << RAMP_OUT_EN),
++			(0x1 << HP_DRVEN) | (0x1 << HP_DRVOUTEN) | (0x1 << RAMP_OUT_EN));
++	snd_soc_component_update_bits(component, SUNXI_POWER_REG,
++			0x1 << HPLDO_EN, 0x1 << HPLDO_EN);
+ }
+ 
+ static int sunxi_codec_startup(struct snd_pcm_substream *substream,
+@@ -1843,6 +1857,7 @@ static struct attribute_group audio_debug_attr_group = {
+ 
+ /* regmap configuration */
+ static const struct regmap_config sunxi_codec_regmap_config = {
++	.name = "sunxi_codec",
+ 	.reg_bits = 32,
+ 	.reg_stride = 4,
+ 	.val_bits = 32,
+diff --git a/sound/soc/sunxi/sun20iw1-sndcodec.c b/sound/soc/sunxi/sun20iw1-sndcodec.c
+index 949b46d1c..d5d7e6fa3 100644
+--- a/sound/soc/sunxi/sun20iw1-sndcodec.c
++++ b/sound/soc/sunxi/sun20iw1-sndcodec.c
+@@ -33,7 +33,7 @@
+ 
+ #define LOG_ERR(fmt, arg...)	pr_err("[SNDCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+ #define LOG_WARN(fmt, arg...)	pr_warn("[SNDCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+-#define LOG_INFO(fmt, arg...)	pr_info("[SNDCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
++#define LOG_INFO(fmt, arg...)	{}	//pr_info("[SNDCODEC][%s][%d]:" fmt "\n", __func__, __LINE__, ##arg)
+ 
+ static int mdata_threshold = 0x10;
+ module_param(mdata_threshold, int, 0644);

+ 27 - 0
Code/patch/d1/wifi.patch

@@ -0,0 +1,27 @@
+diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
+index ff43e32a3..180e372e7 100644
+--- a/drivers/mmc/host/sunxi-mmc.c
++++ b/drivers/mmc/host/sunxi-mmc.c
+@@ -671,7 +671,7 @@ static int sunxi_mmc_finalize_request(struct sunxi_mmc_host *host)
+ 	bool cont_dat_cmd = false;
+ 
+ 	if (host->int_sum & SDXC_INTERRUPT_ERROR_BIT) {
+-		sunxi_mmc_dump_errinfo(host);
++//		sunxi_mmc_dump_errinfo(host);
+ 		if (((host->ctl_spec_cap & SUNXI_SC_EN_RETRY) && data)\
+ 			|| ((host->ctl_spec_cap & SUNXI_SC_EN_RETRY_CMD) && !data)) {
+ 			host->mrq_retry = mrq;
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+index de0629d6d..43dfd8914 100644
+--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
++++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+@@ -545,7 +545,8 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl,
+ 		raw_spin_lock_irqsave(&pctl->lock, flags);
+ 		reg = readl(pctl->membase + PIO_POW_MOD_SEL_REG);
+ 		reg &= ~(1 << bank);
+-		writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG);
++		//writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG);
++		writel(0x00000040, pctl->membase + PIO_POW_MOD_SEL_REG);
+ 		raw_spin_unlock_irqrestore(&pctl->lock, flags);
+ 
+ 		if (pctl->desc->io_bias_cfg_variant ==

+ 1807 - 0
Code/patch/d1/wiringCP0325.patch

@@ -0,0 +1,1807 @@
+diff --git a/build b/build
+index 6844946..886827c 100755
+--- a/build
++++ b/build
+@@ -1,4 +1,4 @@
+-#!/bin/sh -e
++#!/bin/bash -e
+ 
+ # build
+ #	Simple wiringPi build and install script
+@@ -43,6 +43,48 @@ check_make_ok() {
+   fi
+ }
+ 
++select_boards()
++{
++    local cnt=0
++    local choice
++    local call=${1}
++
++    boards=("clockworkpi-a04" "clockworkpi-a06" "clockworkpi-d1")
++
++    if [[ -f /etc/armbian-release ]]; then 
++
++	source /etc/armbian-release
++
++    else
++
++	printf "All available boards:\n"
++    	for var in ${boards[@]} ; do
++       		 printf "%4d. %s\n" $cnt ${boards[$cnt]}
++			((cnt+=1))
++    	done
++
++    	while true ; do
++        	read -p "Choice: " choice
++        	if [ -z "${choice}" ] ; then
++            		continue
++        	fi
++        	if [ -z "${choice//[0-9]/}" ] ; then
++            		if [ $choice -ge 0 -a $choice -lt $cnt ] ; then
++				export BOARD="${boards[$choice]}"
++				break
++            		fi
++        	fi
++        	printf "Invalid input ...\n"
++    	done
++    fi
++
++	[[ $BOARD == clockworkpi-a04 ]] && BOARD=clockworkpi-a04-h6
++	[[ $BOARD == clockworkpi-a06 ]] && BOARD=clockworkpi-a06-rk3399
++	[[ $BOARD == clockworkpi-d1 ]] && BOARD=clockworkpi-d1
++
++	export BOARD="${BOARD}"
++}
++
+ sudo=${WIRINGPI_SUDO-sudo}
+ 
+ if [ x$1 = "xclean" ]; then
+@@ -103,6 +145,8 @@ if [ x$1 != "x" ]; then
+   exit 1
+ fi
+ 
++  select_boards
++
+   echo "wiringPi Build script"
+   echo "====================="
+   echo
+diff --git a/gpio/CPi.h b/gpio/CPi.h
+new file mode 100644
+index 0000000..5b8a141
+--- /dev/null
++++ b/gpio/CPi.h
+@@ -0,0 +1,12 @@
++#ifndef _CPI_H_
++#define _CPI_H_
++
++extern int wiringPiSetupRaw (void);
++extern void CPiBoardId (int *model, int *rev, int *mem, int *maker, int *warranty);
++extern int CPi_get_gpio_mode(int pin);
++extern int CPi_digitalRead(int pin);
++extern void CPi_digitalWrite(int pin, int value);
++extern void CPiReadAll(void);
++extern void CPiReadAllRaw(void);
++
++#endif
+diff --git a/gpio/CPi_readall.c b/gpio/CPi_readall.c
+new file mode 100755
+index 0000000..cf1232b
+--- /dev/null
++++ b/gpio/CPi_readall.c
+@@ -0,0 +1,284 @@
++#include <stdio.h>
++#include <stdlib.h>
++#include <unistd.h>
++#include <wiringPi.h>
++#include "CPi.h"
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++int bcmToGpioCPi[64] =
++{
++	58,  57,	  // 0, 1
++	167, 0, 	 // 2, 3
++	1, 2,	   // 4  5
++	3,	4,		// 6, 7
++	5,	6,		// 8, 9
++	7,	8,		//10,11
++	15,  54,	  //12,13
++	134,  135,		//14,15
++
++	137, 136,	   //16,17
++	139,  138,		//18,19
++	141,  140,		//20,21
++	128,  129,		//22,23
++	130,  131,		//24,25
++	132, 133,	   //26,27
++	9,	201,	//28,29
++	196,   199,    //30,31
++
++	161,  160,		//32,33
++	227,  198,		//34,35
++	163, 166,	   //36,37
++	165,  164,		//38,39
++	228,  224,		//40,41
++	225, 226,	   //42,43
++	56,  55,	  //44,45
++	-1, -1, 	 //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63
++};
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++int bcmToGpioCPi[64] =
++{
++	106,  107,      // 0, 1
++	104, 10,      // 2, 3
++	3, 9,      // 4  5
++	4,  90,      // 6, 7
++	92,  158,      // 8, 9
++	156,  105,      //10,11
++	146,  150,      //12,13
++	81,  80,      //14,15
++
++	82, 83,      //16,17
++	131,  132,      //18,19
++	134,  135,      //20,21
++	89,  88,      //22,23
++	84,  85,      //24,25
++	86, 87,      //26,27
++	112,  113,    //28,29
++	109,   157,    //30,31
++
++	148,  147,      //32,33
++	100,  101,      //34,35
++	102, 103,      //36,37
++	97,  98,      //38,39
++	99,  96,      //40,41
++	110, 111,      //42,43
++	64,  65,      //44,45
++	-1, -1,      //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63
++};
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++
++int bcmToGpioCPi[64] =
++{
++	11,  10,	  // 0, 1
++	105, 171, 	 // 2, 3
++	170, 178,	   // 4  5
++	177,	176,		// 6, 7
++	83,	84,		// 8, 9
++	12,	97,		//10,11
++	98,  99,	  //12,13
++	166,  167,		//14,15
++
++	169, 168,	   //16,17
++	173,  172,		//18,19
++	174,  175,		//20,21
++	160,  161,		//22,23
++	162,  163,		//24,25
++	164, 165,	   //26,27
++	113,	112,	//28,29
++	111,   110,    //30,31
++
++	8,  9,		//32,33
++	109,  108,		//34,35
++	107, 106,	   //36,37
++	76,  75,		//38,39
++	86,  74,		//40,41
++	77, 81,	   //42,43
++	78,  79,	  //44,45
++	-1, -1, 	 //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63
++};
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++
++static char *alts [] =
++{
++  "IN", "OUT", "ALT2", "ALT3", "ALT4", "ALT5", "ALT6", "ALT7", "ALT8", "RSRV", "RSRV", "RSRV", "RSRV", "RSRV", "EINT", "OFF"
++} ;
++
++#else
++
++static char *alts [] =
++{
++  "IN", "OUT", "ALT2", "ALT3", "ALT4", "ALT5", "ALT6", "OFF"
++} ;
++
++#endif
++
++static char* get_pin_name(int pin)
++{
++	static char name[10];
++	char c;
++	int b, d;
++
++	b = pin/32;
++	d = pin % 32;
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++	if(b < 6)
++		c = b + 'C';
++	else
++		c = b - 6 + 'L';
++	sprintf(name, "P%c%d", c, d);
++
++#elif defined(CONFIG_CLOCKWORKPI_A06)
++
++	c = d/8 + 'A';
++	sprintf(name, "%d%c%d", b, c, d % 8);
++
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++
++	c = b + 'B';
++	sprintf(name, "P%c%d", c, d);
++
++#endif
++	return name;
++}
++
++void CPiReadAll(void)
++{
++	int pin, pin2;
++	int tmp = wiringPiDebug;
++	wiringPiDebug = FALSE;
++
++	printf (" +-----+------+------+------+---+-----+------+------+------+---+\n");
++	printf (" | BCM | GPIO | Name | Mode | V | BCM | GPIO | Name | Mode | V |\n");
++	printf (" +-----+------+------+------+---+-----+------+------+------+---+\n");
++
++	for (pin = 0 ; pin < 23; pin ++) {
++		printf (" | %3d", pin);
++		printf (" | %4d", bcmToGpioCPi[pin]);
++		printf (" | %-4s", get_pin_name(bcmToGpioCPi[pin]));
++		printf (" | %4s", alts [CPi_get_gpio_mode(bcmToGpioCPi[pin])]);
++		printf (" | %d", CPi_digitalRead(bcmToGpioCPi[pin])) ;
++		pin2 = pin + 23;
++		printf (" | %3d", pin2);
++		printf (" | %4d", bcmToGpioCPi[pin2]);
++		printf (" | %-4s", get_pin_name(bcmToGpioCPi[pin2]));
++		printf (" | %4s", alts [CPi_get_gpio_mode(bcmToGpioCPi[pin2])]);
++		printf (" | %d", CPi_digitalRead(bcmToGpioCPi[pin2])) ;
++		printf (" |\n") ;
++	}
++
++	printf (" +-----+------+------+------+---+-----+------+------+------+---+\n");
++	printf (" | BCM | GPIO | Name | Mode | V | BCM | GPIO | Name | Mode | V |\n");
++	printf (" +-----+------+------+------+---+-----+------+------+------+---+\n");
++
++	wiringPiDebug = tmp;
++}
++
++void CPiReadAllRaw(void)
++{
++	int pin, pin2, i;
++	int tmp = wiringPiDebug;
++	wiringPiDebug = FALSE;
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++	printf (" | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V |\n");
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++
++	for (pin = 0 ; pin < 27; pin++) {
++		pin2 = pin;
++		for(i = 0; i < 6; i++) {
++			if(CPi_get_gpio_mode(pin2) >= 0) {
++				printf (" | %4d", pin2) ;
++				printf (" | %-4s", get_pin_name(pin2));
++				printf (" | %4s", alts [CPi_get_gpio_mode(pin2)]) ;
++				printf (" | %d", CPi_digitalRead(pin2)) ;
++			} else {
++				printf (" |     ") ;
++				printf (" |     ") ;
++				printf (" |     ") ;
++				printf (" |  ") ;
++			}
++			pin2 += 32;
++			if(i == 1) pin2 += 64;
++		}
++		printf (" |\n") ;
++	}
++
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++	printf (" | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V |\n");
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++
++#elif defined(CONFIG_CLOCKWORKPI_A06)
++
++	printf (" +------+------+---+------+------+---+------+------+---+------+------+---+------+------+---+\n");
++	printf (" | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V |\n");
++	printf (" +------+------+---+------+------+---+------+------+---+------+------+---+------+------+---+\n");
++
++	for (pin = 0 ; pin < 32; pin++) {
++		pin2 = pin;
++		for(i = 0; i < 5; i++) {
++			printf (" | %4d", pin2) ;
++			printf (" | %4s", alts [CPi_get_gpio_mode(pin2)]) ;
++			printf (" | %d", CPi_digitalRead(pin2)) ;
++			pin2 += 32;
++		}
++		printf (" |\n") ;
++	}
++
++	printf (" +------+------+---+------+------+---+------+------+---+------+------+---+------+------+---+\n");
++	printf (" | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V | GPIO | Mode | V |\n");
++	printf (" +------+------+---+------+------+---+------+------+---+------+------+---+------+------+---+\n");
++
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++	printf (" | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V |\n");
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++
++	for (pin = 0 ; pin < 23; pin++) {
++		pin2 = pin;
++		for(i = 0; i < 6; i++) {
++			if(CPi_get_gpio_mode(pin2) >= 0) {
++				printf (" | %4d", pin2) ;
++				printf (" | %-4s", get_pin_name(pin2));
++				printf (" | %4s", alts [CPi_get_gpio_mode(pin2)]) ;
++				printf (" | %d", CPi_digitalRead(pin2)) ;
++			} else {
++				printf (" |     ") ;
++				printf (" |     ") ;
++				printf (" |     ") ;
++				printf (" |  ") ;
++			}
++			pin2 += 32;
++		}
++		printf (" |\n") ;
++	}
++
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++	printf (" | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V | GPIO | Name | Mode | V |\n");
++	printf (" +------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+------+------+------+---+\n");
++
++#endif
++
++	wiringPiDebug = tmp;
++}
++
+diff --git a/gpio/Makefile b/gpio/Makefile
+index 9ec160d..3e34160 100644
+--- a/gpio/Makefile
++++ b/gpio/Makefile
+@@ -39,10 +39,28 @@ CFLAGS	= $(DEBUG) -Wall -Wextra $(INCLUDE) -Winline -pipe
+ LDFLAGS	= -L$(DESTDIR)$(PREFIX)/lib
+ LIBS    = -lwiringPi -lwiringPiDev -lpthread -lrt -lm -lcrypt
+ 
++ifeq ($(BOARD),)
++  BOARD = clockworkpi-d1
++endif
++
++ifeq ($(BOARD), clockworkpi-a04-h6)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_A04
++endif
++
++ifeq ($(BOARD), clockworkpi-a06-rk3399)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_A06
++endif
++
++ifeq ($(BOARD), clockworkpi-d1)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_D1
++endif
++
++EXTRA_CFLAGS += -DCONFIG_CLOCKWORKPI
++
+ # May not need to  alter anything below this line
+ ###############################################################################
+ 
+-SRC	=	gpio.c readall.c
++SRC	=	gpio.c readall.c CPi_readall.c
+ 
+ OBJ	=	$(SRC:.c=.o)
+ 
+@@ -57,7 +75,7 @@ gpio:	$(OBJ)
+ 
+ .c.o:
+ 	$Q echo [Compile] $<
+-	$Q $(CC) -c $(CFLAGS) $< -o $@
++	$Q $(CC) -c $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@
+ 
+ .PHONY:	clean
+ clean:
+diff --git a/gpio/gpio.c b/gpio/gpio.c
+index 714e790..1a12a41 100644
+--- a/gpio/gpio.c
++++ b/gpio/gpio.c
+@@ -42,6 +42,10 @@
+ 
+ #include "../version.h"
+ 
++#ifdef CONFIG_CLOCKWORKPI
++#include "CPi.h"
++#endif
++
+ extern int wiringPiDebug ;
+ 
+ // External functions I can't be bothered creating a separate .h file for:
+@@ -742,7 +746,18 @@ void doMode (int argc, char *argv [])
+   pin = atoi (argv [2]) ;
+ 
+   mode = argv [3] ;
+-
++#ifdef CONFIG_CLOCKWORKPI
++  if (strcasecmp (mode, "in")	  == 0) pinMode (pin, INPUT) ;
++  else if (strcasecmp (mode, "input")   == 0) pinMode (pin, INPUT) ;
++  else if (strcasecmp (mode, "out")	  == 0) pinMode (pin, OUTPUT) ;
++  else if (strcasecmp (mode, "output")  == 0) pinMode (pin, OUTPUT) ;
++  else if (strcasecmp (mode, "alt2")    == 0) pinModeAlt (pin, 0b010) ;
++  else if (strcasecmp (mode, "alt3")    == 0) pinModeAlt (pin, 0b011) ;
++  else if (strcasecmp (mode, "alt4")    == 0) pinModeAlt (pin, 0b100) ;
++  else if (strcasecmp (mode, "alt5")    == 0) pinModeAlt (pin, 0b101) ;
++  else if (strcasecmp (mode, "alt6")    == 0) pinModeAlt (pin, 0b110) ;
++  else if (strcasecmp (mode, "alt7")    == 0) pinModeAlt (pin, 0b111) ;
++#else
+   /**/ if (strcasecmp (mode, "in")      == 0) pinMode         (pin, INPUT) ;
+   else if (strcasecmp (mode, "input")   == 0) pinMode         (pin, INPUT) ;
+   else if (strcasecmp (mode, "out")     == 0) pinMode         (pin, OUTPUT) ;
+@@ -760,6 +775,7 @@ void doMode (int argc, char *argv [])
+   else if (strcasecmp (mode, "alt3")    == 0) pinModeAlt (pin, 0b111) ;
+   else if (strcasecmp (mode, "alt4")    == 0) pinModeAlt (pin, 0b011) ;
+   else if (strcasecmp (mode, "alt5")    == 0) pinModeAlt (pin, 0b010) ;
++#endif
+   else
+   {
+     fprintf (stderr, "%s: Invalid mode: %s. Should be in/out/pwm/clock/up/down/tri\n", argv [1], mode) ;
+@@ -1299,6 +1315,90 @@ static void doVersion (char *argv [])
+     printf ("  * Root or sudo required for GPIO access.\n") ;
+ }
+ 
++static void doReadRaw (int argc, char *argv []) 
++{
++#ifdef CONFIG_CLOCKWORKPI
++	int pin, val ;
++
++	if (argc != 3) {
++		fprintf (stderr, "Usage: %s readraw pin\n", argv [0]) ;
++		exit (1) ;
++	}
++
++	pin = atoi (argv [2]) ;
++	val = CPi_digitalRead(pin);	
++
++	printf ("%s\n", val == 0 ? "0" : "1") ;
++#endif
++}
++
++static void doWriteRaw (int argc, char *argv [])
++{
++#ifdef CONFIG_CLOCKWORKPI
++	int pin, val ;
++
++	if (argc != 4) {
++		fprintf (stderr, "Usage: %s writeraw pin value\n", argv [0]) ;
++		exit (1) ;
++	}
++
++	pin = atoi (argv [2]) ;
++
++	if ((strcasecmp (argv [3], "up") == 0) || (strcasecmp (argv [3], "on") == 0))
++		val = 1 ;
++	else if ((strcasecmp (argv [3], "down") == 0) || (strcasecmp (argv [3], "off") == 0))
++		val = 0 ;
++	else
++		val = atoi (argv [3]) ;
++
++	if (val == 0)
++		CPi_digitalWrite (pin, LOW) ;
++	else
++		CPi_digitalWrite (pin, HIGH) ;
++#endif
++}
++
++static void doModeRaw (int argc, char *argv [])
++{
++#ifdef CONFIG_CLOCKWORKPI
++  int pin ;
++  char *mode ;
++
++  if (argc != 4)
++  {
++    fprintf (stderr, "Usage: %s mode pin mode\n", argv [0]) ;
++    exit (1) ;
++  }
++  wiringPiSetupRaw();
++
++  pin = atoi (argv [2]) ;
++
++  mode = argv [3] ;
++
++  /**/ if (strcasecmp (mode, "in")      == 0) pinMode         (pin, INPUT) ;
++  else if (strcasecmp (mode, "input")   == 0) pinMode         (pin, INPUT) ;
++  else if (strcasecmp (mode, "out")     == 0) pinMode         (pin, OUTPUT) ;
++  else if (strcasecmp (mode, "output")  == 0) pinMode         (pin, OUTPUT) ;
++  else if (strcasecmp (mode, "pwm")     == 0) pinMode         (pin, PWM_OUTPUT) ;
++  else if (strcasecmp (mode, "pwmTone") == 0) pinMode         (pin, PWM_TONE_OUTPUT) ;
++  else if (strcasecmp (mode, "clock")   == 0) pinMode         (pin, GPIO_CLOCK) ;
++  else if (strcasecmp (mode, "up")      == 0) pullUpDnControl (pin, PUD_UP) ;
++  else if (strcasecmp (mode, "down")    == 0) pullUpDnControl (pin, PUD_DOWN) ;
++  else if (strcasecmp (mode, "tri")     == 0) pullUpDnControl (pin, PUD_OFF) ;
++  else if (strcasecmp (mode, "off")     == 0) pullUpDnControl (pin, PUD_OFF) ;
++  else if (strcasecmp (mode, "alt2")    == 0) pinModeAlt (pin, 0b010) ;
++  else if (strcasecmp (mode, "alt3")    == 0) pinModeAlt (pin, 0b011) ;
++  else if (strcasecmp (mode, "alt4")    == 0) pinModeAlt (pin, 0b100) ;
++  else if (strcasecmp (mode, "alt5")    == 0) pinModeAlt (pin, 0b101) ;
++  else if (strcasecmp (mode, "alt6")    == 0) pinModeAlt (pin, 0b110) ;
++  else if (strcasecmp (mode, "alt7")    == 0) pinModeAlt (pin, 0b111) ;
++  else
++  {
++    fprintf (stderr, "%s: Invalid mode: %s. Should be in/out/pwm/clock/up/down/tri\n", argv [1], mode) ;
++    exit (1) ;
++  }
++#endif
++}
+ 
+ /*
+  * main:
+@@ -1376,7 +1476,7 @@ int main (int argc, char *argv [])
+     fprintf (stderr, "%s: Must be root to run. Program should be suid root. This is an error.\n", argv [0]) ;
+     exit (EXIT_FAILURE) ;
+   }
+-
++#ifndef CONFIG_CLOCKWORKPI
+ // Initial test for /sys/class/gpio operations:
+ 
+   /**/ if (strcasecmp (argv [1], "exports"    ) == 0)	{ doExports     (argc, argv) ;	return 0 ; }
+@@ -1398,7 +1498,7 @@ int main (int argc, char *argv [])
+ 
+   if (strcasecmp (argv [1], "gbr" ) == 0)	{ doGbr (argc, argv) ; return 0 ; }
+   if (strcasecmp (argv [1], "gbw" ) == 0)	{ doGbw (argc, argv) ; return 0 ; }
+-
++#endif
+ // Check for allreadall command, force Gpio mode
+ 
+   if (strcasecmp (argv [1], "allreadall") == 0)
+@@ -1453,7 +1553,16 @@ int main (int argc, char *argv [])
+     --argc ;
+     wpMode = WPI_MODE_UNINITIALISED ;
+   }
+-
++#ifdef CONFIG_CLOCKWORKPI
++  else if (strcasecmp (argv [1], "-r") == 0)
++  {
++    wiringPiSetupRaw();
++    for (i = 2 ; i < argc ; ++i)
++      argv [i - 1] = argv [i] ;
++    --argc ;
++    wpMode = WPI_MODE_GPIO ;
++  }
++#endif
+ // Default to wiringPi mode
+ 
+   else
+@@ -1494,6 +1603,16 @@ int main (int argc, char *argv [])
+     exit (EXIT_FAILURE) ;
+   }
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  /**/ if (strcasecmp (argv [1], "mode"   ) == 0) doMode      (argc, argv) ;
++  else if (strcasecmp (argv [1], "moderaw"   ) == 0) doModeRaw      (argc, argv) ;  
++  else if (strcasecmp (argv [1], "read"   ) == 0) doRead      (argc, argv) ;
++  else if (strcasecmp (argv [1], "readraw"   ) == 0) doReadRaw      (argc, argv) ;
++  else if (strcasecmp (argv [1], "write"  ) == 0) doWrite     (argc, argv) ;
++  else if (strcasecmp (argv [1], "writeraw"  ) == 0) doWriteRaw     (argc, argv) ;
++  else if (strcasecmp (argv [1], "readall"  ) == 0) CPiReadAll    () ;
++  else if (strcasecmp (argv [1], "readallraw"  ) == 0) CPiReadAllRaw    () ;
++#else
+ // Core wiringPi functions
+ 
+   /**/ if (strcasecmp (argv [1], "mode"   ) == 0) doMode      (argc, argv) ;
+@@ -1528,6 +1647,7 @@ int main (int argc, char *argv [])
+   else if (strcasecmp (argv [1], "rbd"      ) == 0) doReadByte   (argc, argv, FALSE) ;
+   else if (strcasecmp (argv [1], "clock"    ) == 0) doClock      (argc, argv) ;
+   else if (strcasecmp (argv [1], "wfi"      ) == 0) doWfi        (argc, argv) ;
++#endif
+   else
+   {
+     fprintf (stderr, "%s: Unknown command: %s.\n", argv [0], argv [1]) ;
+diff --git a/gpio/readall.c b/gpio/readall.c
+index 097755a..09eb0a4 100644
+--- a/gpio/readall.c
++++ b/gpio/readall.c
+@@ -35,6 +35,10 @@
+ 
+ #include <wiringPi.h>
+ 
++#ifdef CONFIG_CLOCKWORKPI
++#include "CPi.h"
++#endif
++
+ extern int wpMode ;
+ 
+ #ifndef TRUE
+@@ -341,7 +345,9 @@ static void piPlusReadall (int model)
+ void doReadall (void)
+ {
+   int model, rev, mem, maker, overVolted ;
+-
++#ifdef CONFIG_CLOCKWORKPI
++  CPiReadAll();
++#else
+   if (wiringPiNodes != NULL)	// External readall
+   {
+     doReadallExternal () ;
+@@ -362,6 +368,7 @@ void doReadall (void)
+     allReadall () ;
+   else
+     printf ("Oops - unable to determine board type... model: %d\n", model) ;
++#endif
+ }
+ 
+ 
+diff --git a/wiringPi/Makefile b/wiringPi/Makefile
+index 287fa58..dec500b 100644
+--- a/wiringPi/Makefile
++++ b/wiringPi/Makefile
+@@ -44,6 +44,24 @@ CFLAGS	= $(DEBUG) $(DEFS) -Wformat=2 -Wall -Wextra -Winline $(INCLUDE) -pipe -fP
+ 
+ LIBS    = -lm -lpthread -lrt -lcrypt
+ 
++ifeq ($(BOARD),)
++  BOARD = clockworkpi-d1
++endif
++
++ifeq ($(BOARD), clockworkpi-a04-h6)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_A04
++endif
++
++ifeq ($(BOARD), clockworkpi-a06-rk3399)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_A06
++endif
++
++ifeq ($(BOARD), clockworkpi-d1)
++EXTRA_CFLAGS = -DCONFIG_CLOCKWORKPI_D1
++endif
++
++EXTRA_CFLAGS += -DCONFIG_CLOCKWORKPI
++
+ ###############################################################################
+ 
+ SRC	=	wiringPi.c						\
+@@ -61,7 +79,8 @@ SRC	=	wiringPi.c						\
+ 		bmp180.c htu21d.c ds18b20.c rht03.c			\
+ 		drcSerial.c drcNet.c					\
+ 		pseudoPins.c						\
+-		wpiExtensions.c
++		wpiExtensions.c 					\
++		wiringCPi.c
+ 
+ HEADERS =	$(shell ls *.h)
+ 
+@@ -79,7 +98,7 @@ $(DYNAMIC):	$(OBJ)
+ 
+ .c.o:
+ 	$Q echo [Compile] $<
+-	$Q $(CC) -c $(CFLAGS) $< -o $@
++	$Q $(CC) -c $(EXTRA_CFLAGS) $(CFLAGS) $< -o $@
+ 
+ 
+ .PHONY:	clean
+diff --git a/wiringPi/wiringCPi.c b/wiringPi/wiringCPi.c
+new file mode 100755
+index 0000000..f5f1303
+--- /dev/null
++++ b/wiringPi/wiringCPi.c
+@@ -0,0 +1,819 @@
++#include "wiringPi.h"
++#include <stdio.h>
++#include <stdint.h>
++#include <string.h>
++#include <unistd.h>
++#include <fcntl.h>
++#include "wiringCPi.h"
++
++#include <stdarg.h>
++#include <stdlib.h>
++#include <ctype.h>
++#include <poll.h>
++#include <errno.h>
++#include <time.h>
++#include <pthread.h>
++#include <sys/time.h>
++#include <sys/mman.h>
++#include <sys/stat.h>
++#include <sys/wait.h>
++#include <sys/ioctl.h>
++#include <limits.h>
++#include "softPwm.h"
++#include "softTone.h"
++
++
++static int wpimode = -1 ;
++#define WPI_MODE_BCM 0
++#define WPI_MODE_RAW 1
++#define BLOCK_SIZE (4*1024)
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++int bcmToGpioCPi[64] =
++{
++	58,  57,      // 0, 1
++	167, 0,      // 2, 3
++	1, 2,      // 4  5
++	3,  4,      // 6, 7
++	5,  6,      // 8, 9
++	7,  8,      //10,11
++	15,  54,      //12,13
++	134,  135,      //14,15
++
++	137, 136,      //16,17
++	139,  138,      //18,19
++	141,  140,      //20,21
++	128,  129,      //22,23
++	130,  131,      //24,25
++	132, 133,      //26,27
++	9,  201,    //28,29
++	196,   199,    //30,31
++
++	161,  160,      //32,33
++	227,  198,      //34,35
++	163, 166,      //36,37
++	165,  164,      //38,39
++	228,  224,      //40,41
++	225, 226,      //42,43
++	56,  55,      //44,45
++	-1, -1,      //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63
++};
++
++int CPI_PIN_MASK[8][32] =  //[BANK]  [INDEX]
++{
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PC	0
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1,},//PD	32
++	{-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,},//PE		64
++	{-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,},//PF		96
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PG	128
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PH	160
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PL	192
++	{ 1, 1, 1, 1, 1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,},//PM	224
++};
++
++volatile uint32_t *gpio_base;
++volatile uint32_t *gpioL_base;
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++int bcmToGpioCPi[64] =
++{
++	106,  107,      // 0, 1
++	104, 10,      // 2, 3
++	3, 9,      // 4  5
++	4,  90,      // 6, 7
++	92,  158,      // 8, 9
++	156,  105,      //10,11
++	146,  150,      //12,13
++	81,  80,      //14,15
++
++	82, 83,      //16,17
++	131,  132,      //18,19
++	134,  135,      //20,21
++	89,  88,      //22,23
++	84,  85,      //24,25
++	86, 87,      //26,27
++	112,  113,    //28,29
++	109,   157,    //30,31
++
++	148,  147,      //32,33
++	100,  101,      //34,35
++	102, 103,      //36,37
++	97,  98,      //38,39
++	99,  96,      //40,41
++	110, 111,      //42,43
++	64,  65,      //44,45
++	-1, -1,      //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63	
++};
++
++  int CPI_PIN_MASK[5][32] =  //[BANK]	[INDEX]
++  {
++   { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,},//GPIO0
++   { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,},//GPIO1
++   { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,},//GPIO2
++   { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,},//GPIO3
++   { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,},//GPIO4
++  };
++
++volatile uint32_t *cru_base;
++volatile uint32_t *grf_base;
++volatile uint32_t *pmugrf_base;
++volatile uint32_t *pmucru_base;
++volatile uint32_t *gpio0_base;
++volatile uint32_t *gpio1_base;
++volatile uint32_t *gpio2_base;
++volatile uint32_t *gpio3_base;
++volatile uint32_t *gpio4_base;
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++
++int bcmToGpioCPi[64] =
++{
++	11,  10,	  // 0, 1
++	105, 171, 	 // 2, 3
++	170, 178,	   // 4  5
++	177,	176,		// 6, 7
++	83,	84,		// 8, 9
++	12,	97,		//10,11
++	98,  99,	  //12,13
++	166,  167,		//14,15
++
++	169, 168,	   //16,17
++	173,  172,		//18,19
++	174,  175,		//20,21
++	160,  161,		//22,23
++	162,  163,		//24,25
++	164, 165,	   //26,27
++	113,	112,	//28,29
++	111,   110,    //30,31
++
++	8,  9,		//32,33
++	109,  108,		//34,35
++	107, 106,	   //36,37
++	76,  75,		//38,39
++	86,  74,		//40,41
++	77, 81,	   //42,43
++	78,  79,	  //44,45
++	-1, -1, 	 //46,47
++
++	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,// ... 63
++};
++
++int CPI_PIN_MASK[6][32] =  //[BANK]  [INDEX]
++{
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PB	0
++	{ 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PC	32
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PD	64
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,},//PE	96
++	{ 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PF	128
++	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,},//PG	160
++};
++
++volatile uint32_t *gpio_base;
++
++#endif
++
++static unsigned int readR(unsigned int addr)
++{
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	unsigned int val = 0;
++	unsigned int mmap_base = (addr & ~MAP_MASK);
++	unsigned int mmap_seek = (addr - mmap_base);
++
++	if(mmap_base == CRU_BASE)
++		val = *((unsigned int *)((unsigned char *)cru_base + mmap_seek));
++	else if(mmap_base == GRF_BASE)
++		val = *((unsigned int *)((unsigned char *)grf_base + mmap_seek));
++	else if(mmap_base == PMUCRU_BASE)
++		val = *((unsigned int *)((unsigned char *)pmucru_base + mmap_seek));
++	else if(mmap_base == PMUGRF_BASE)
++		val = *((unsigned int *)((unsigned char *)pmugrf_base + mmap_seek));
++	else if(mmap_base == GPIO0_BASE)
++		val = *((unsigned int *)((unsigned char *)gpio0_base + mmap_seek));
++	else if(mmap_base == GPIO1_BASE)
++		val = *((unsigned int *)((unsigned char *)gpio1_base + mmap_seek));
++	else if(mmap_base == GPIO2_BASE)
++		val = *((unsigned int *)((unsigned char *)gpio2_base + mmap_seek));
++	else if(mmap_base == GPIO3_BASE)
++		val = *((unsigned int *)((unsigned char *)gpio3_base + mmap_seek));
++	else if(mmap_base == GPIO4_BASE)
++		val = *((unsigned int *)((unsigned char *)gpio4_base + mmap_seek));
++
++	return val;
++
++#elif (defined CONFIG_CLOCKWORKPI_A04)
++
++	uint32_t val = 0;
++	uint32_t mmap_base = (addr & ~MAP_MASK);
++	uint32_t mmap_seek = ((addr - mmap_base) >> 2);
++
++	if (addr >= GPIOL_BASE)
++		val = *(gpioL_base + mmap_seek);
++	else
++		val = *(gpio_base + mmap_seek);
++
++	return val;
++
++#elif (defined CONFIG_CLOCKWORKPI_D1)
++
++	uint32_t val = 0;
++	uint32_t mmap_base = (addr & ~MAP_MASK);
++	uint32_t mmap_seek = ((addr - mmap_base) >> 2);
++
++	val = *(gpio_base + mmap_seek);
++
++	return val;
++
++#endif
++}
++
++static void writeR(unsigned int val, unsigned int addr)
++{
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	unsigned int mmap_base = (addr & ~MAP_MASK);
++	unsigned int mmap_seek = (addr - mmap_base);
++
++	if(mmap_base == CRU_BASE) 
++		*((unsigned int *)((unsigned char *)cru_base + mmap_seek)) = val;
++	else if(mmap_base == GRF_BASE)
++		*((unsigned int *)((unsigned char *)grf_base + mmap_seek)) = val;
++	else if(mmap_base == PMUCRU_BASE)
++		*((unsigned int *)((unsigned char *)pmucru_base + mmap_seek)) = val;
++	else if(mmap_base == PMUGRF_BASE)
++		*((unsigned int *)((unsigned char *)pmugrf_base + mmap_seek)) = val;
++	else if(mmap_base == GPIO0_BASE)
++		*((unsigned int *)((unsigned char *)gpio0_base + mmap_seek)) = val;
++	else if(mmap_base == GPIO1_BASE)
++		*((unsigned int *)((unsigned char *)gpio1_base + mmap_seek)) = val;
++	else if(mmap_base == GPIO2_BASE)
++		*((unsigned int *)((unsigned char *)gpio2_base + mmap_seek)) = val;
++	else if(mmap_base == GPIO3_BASE)
++		*((unsigned int *)((unsigned char *)gpio3_base + mmap_seek)) = val;
++	else if(mmap_base == GPIO4_BASE)
++		*((unsigned int *)((unsigned char *)gpio4_base + mmap_seek)) = val;
++
++#elif (defined CONFIG_CLOCKWORKPI_A04)
++
++	unsigned int mmap_base = (addr & ~MAP_MASK);
++	unsigned int mmap_seek = ((addr - mmap_base) >> 2);
++
++	if (addr >= GPIOL_BASE)
++		*(gpioL_base + mmap_seek) = val;
++	else
++		*(gpio_base + mmap_seek) = val;
++
++#elif (defined CONFIG_CLOCKWORKPI_D1)
++
++	unsigned int mmap_base = (addr & ~MAP_MASK);
++	unsigned int mmap_seek = ((addr - mmap_base) >> 2);
++
++	*(gpio_base + mmap_seek) = val;
++
++#endif
++}
++
++int CPi_get_gpio_mode(int pin)
++{
++	unsigned int regval = 0;
++	unsigned int bank   = pin >> 5;
++	unsigned int index  = pin - (bank << 5);
++	unsigned int phyaddr = 0;
++	unsigned char mode = -1;
++
++	if (CPI_PIN_MASK[bank][index] < 0)
++		return -1;
++	
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	unsigned int grf_phyaddr = 0, ddr_phyaddr = 0;
++	int offset = ((index - ((index >> 3) << 3)));
++
++	if(bank == 0){
++		grf_phyaddr = PMUGRF_BASE + ((index >> 3) << 2);
++		ddr_phyaddr = GPIO0_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 1){
++		grf_phyaddr = PMUGRF_BASE + ((index >> 3) << 2) + 0x10;
++		ddr_phyaddr = GPIO1_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}	
++	else if(bank == 2){
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2);
++		ddr_phyaddr = GPIO2_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 3){
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2) +0x10;
++		ddr_phyaddr = GPIO3_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 4){
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2) +0x20;
++		ddr_phyaddr = GPIO4_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++
++	regval = readR(grf_phyaddr);
++	mode = (regval >> (offset << 1)) & 0x3;
++
++	if(mode == 0){
++		regval = readR(ddr_phyaddr);
++		return (regval >> index) & 1;
++	}
++
++	return mode + 1;
++
++#elif (defined CONFIG_CLOCKWORKPI_A04)
++
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	if (bank >= 6) {
++		phyaddr = GPIOL_BASE + (bank -6) * 0x24 + ((index >> 3) << 2);
++	}
++	else {
++		phyaddr = GPIO_BASE_MAP + (bank * 0x24) + ((index >> 3) << 2);
++	}
++
++	regval = readR(phyaddr);
++	mode = (regval >> offset) & 7;
++
++	return mode;
++
++#elif (defined CONFIG_CLOCKWORKPI_D1)
++
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	phyaddr = GPIO_BASE_MAP + (bank * 0x30) + ((index >> 3) << 2);
++
++	regval = readR(phyaddr);
++	mode = (regval >> offset) & 0xf;
++
++	return mode;
++
++#endif
++}
++
++/*
++ * Set GPIO Mode
++ */
++int CPi_set_gpio_mode(int pin, int mode)
++{
++    unsigned int regval = 0;
++    unsigned int bank   = pin >> 5;
++    unsigned int index  = pin - (bank << 5);
++    unsigned int phyaddr = 0;
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	if (bank >= 6) {
++		phyaddr = GPIOL_BASE + (bank -6) * 0x24 + ((index >> 3) << 2);
++	} else {
++		phyaddr = GPIO_BASE_MAP + (bank * 0x24) + ((index >> 3) << 2);
++	}
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	int offset = ((index - ((index >> 3) << 3)));
++	unsigned int cru_phyaddr, grf_phyaddr, gpio_phyaddr;
++
++	if(bank == 0){
++		cru_phyaddr = PMUCRU_BASE + PMUCRU_CLKGATE_CON1_OFFSET;
++		grf_phyaddr = PMUGRF_BASE + ((index >> 3) << 2);
++		gpio_phyaddr = GPIO0_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 1){
++		cru_phyaddr = PMUCRU_BASE + PMUCRU_CLKGATE_CON1_OFFSET;
++		grf_phyaddr = PMUGRF_BASE + ((index >> 3) << 2) + 0x10;
++		gpio_phyaddr = GPIO1_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 2){
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2);
++		gpio_phyaddr = GPIO2_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 3){
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2) +0x10;
++		gpio_phyaddr = GPIO3_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++	else if(bank == 4){
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++		grf_phyaddr = GRF_BASE + ((index >> 3) << 2) +0x20;
++		gpio_phyaddr = GPIO4_BASE + GPIO_SWPORTA_DDR_OFFSET;
++	}
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++	
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	phyaddr = GPIO_BASE_MAP + (bank * 0x30) + ((index >> 3) << 2);
++	
++#endif
++
++	if (CPI_PIN_MASK[bank][index] != -1) {
++#ifndef CONFIG_CLOCKWORKPI_A06
++		regval = readR(phyaddr);
++		if (wiringPiDebug)
++			printf("Before read reg val: 0x%x offset:%d\n",regval,offset);
++#endif
++		if (wiringPiDebug)
++		    printf("Register[%#x]: %#x index:%d\n", phyaddr, regval, index);
++
++		if (INPUT == mode) {
++#ifdef CONFIG_CLOCKWORKPI_A06
++			writeR(0xffff0180, cru_phyaddr);
++			regval = readR(grf_phyaddr);
++			regval |= 0x3 << ((offset << 1) | 0x10);
++			regval &= ~(0x3 << (offset << 1));
++			writeR(regval, grf_phyaddr);
++			regval = readR(gpio_phyaddr);
++			regval &= ~(1 << index);
++			writeR(regval, gpio_phyaddr);
++			if (wiringPiDebug){
++				regval = readR(gpio_phyaddr);
++				printf("Input mode set over reg val: %#x\n",regval);
++			}
++#else
++			regval &= ~(7 << offset);
++			writeR(regval, phyaddr);
++			regval = readR(phyaddr);
++			if (wiringPiDebug)
++				printf("Input mode set over reg val: %#x\n",regval);
++#endif
++		} else if (OUTPUT == mode) {
++#ifdef CONFIG_CLOCKWORKPI_A06
++			writeR(0xffff0180, cru_phyaddr);
++			regval = readR(grf_phyaddr);
++			regval |= 0x3 << ((offset << 1) | 0x10);
++			regval &= ~(0x3 << (offset << 1));
++			writeR(regval, grf_phyaddr);
++			regval = readR(gpio_phyaddr);
++			regval |= 1 << index;
++			writeR(regval, gpio_phyaddr);
++			if (wiringPiDebug){
++				regval = readR(gpio_phyaddr);
++				printf("Out mode get value: 0x%x\n",regval);
++			}
++#else
++			regval &= ~(7 << offset);
++			regval |=  (1 << offset);
++			if (wiringPiDebug)
++				printf("Out mode ready set val: 0x%x\n",regval);
++			writeR(regval, phyaddr);
++			regval = readR(phyaddr);
++			if (wiringPiDebug)
++				printf("Out mode get value: 0x%x\n",regval);
++#endif
++		} else 
++			printf("Unknow mode\n");
++	} else
++		printf("unused pin\n");
++}
++
++int CPi_set_gpio_alt(int pin, int mode)
++{
++#ifdef CONFIG_CLOCKWORKPI_A04
++	unsigned int regval = 0;
++	unsigned int bank   = pin >> 5;
++	unsigned int index  = pin - (bank << 5);
++	unsigned int phyaddr = 0;
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	if (bank >= 6) {
++		phyaddr = GPIOL_BASE + ((index >> 3) << 2);
++	}else
++		phyaddr = GPIO_BASE_MAP + (bank * 0x24) + ((index >> 3) << 2);
++
++	/* Ignore unused gpio */
++	if (CPI_PIN_MASK[bank][index] != -1) {
++		if (wiringPiDebug)
++			printf("Register[%#x]: %#x index:%d\n", phyaddr, regval, index);
++
++		regval = readR(phyaddr);
++		regval &= ~(7 << offset);
++		regval |=  (mode << offset);
++		writeR(regval, phyaddr);
++	} else
++		printf("Pin alt mode failed!\n");
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++	unsigned int regval = 0;
++	unsigned int bank	= pin >> 5;
++	unsigned int index	= pin - (bank << 5);
++	unsigned int phyaddr = 0;
++	int offset = ((index - ((index >> 3) << 3)) << 2);
++
++	phyaddr = GPIO_BASE_MAP + (bank * 0x30) + ((index >> 3) << 2);
++
++	/* Ignore unused gpio */
++	if (CPI_PIN_MASK[bank][index] != -1) {
++		if (wiringPiDebug)
++			printf("Register[%#x]: %#x index:%d\n", phyaddr, regval, index);
++
++		regval = readR(phyaddr);
++		regval &= ~(7 << offset);
++		regval |=  (mode << offset);
++		writeR(regval, phyaddr);
++	} else
++		printf("Pin alt mode failed!\n");
++#endif
++
++	return 0;
++}
++
++/*
++ * CPi Digital write 
++ */
++void CPi_digitalWrite(int pin, int value)
++{
++	unsigned int bank   = pin >> 5;
++	unsigned int index  = pin - (bank << 5);
++	unsigned int phyaddr = 0;
++	unsigned int regval = 0;
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++	
++	if (bank >= 6) {
++		phyaddr = GPIOL_BASE + (bank -6) * 0x24 + 0x10;
++	} else {
++		phyaddr = GPIO_BASE_MAP + (bank * 0x24) + 0x10;
++	}
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	unsigned int cru_phyaddr = 0;
++
++	if(bank == 0){
++		phyaddr = GPIO0_BASE + GPIO_SWPORTA_DR_OFFSET;
++		cru_phyaddr = PMUCRU_BASE + PMUCRU_CLKGATE_CON1_OFFSET;
++	}
++	else if(bank == 1){
++		phyaddr = GPIO1_BASE + GPIO_SWPORTA_DR_OFFSET;
++		cru_phyaddr = PMUCRU_BASE + PMUCRU_CLKGATE_CON1_OFFSET;
++	}
++	else if(bank == 2){
++		phyaddr = GPIO2_BASE + GPIO_SWPORTA_DR_OFFSET;			
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++	}
++	else if(bank == 3){
++		phyaddr = GPIO3_BASE + GPIO_SWPORTA_DR_OFFSET;
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++	}
++	else if(bank == 4){
++		phyaddr = GPIO4_BASE + GPIO_SWPORTA_DR_OFFSET;			
++		cru_phyaddr = CRU_BASE + CRU_CLKGATE_CON31_OFFSET;
++	}
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++	
++	phyaddr = GPIO_BASE_MAP + (bank * 0x30) + 0x10;
++
++#endif
++
++	if (CPI_PIN_MASK[bank][index] != -1) {
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++		writeR(0xffff0180, cru_phyaddr);
++#endif
++
++		if (wiringPiDebug)
++			printf("pin: %d, bank: %d, index: %d, phyaddr: 0x%x\n", pin, bank, index, phyaddr);
++
++		regval = readR(phyaddr);
++		if (wiringPiDebug)
++			printf("befor write reg val: 0x%x,index:%d\n", regval, index);
++		if(0 == value) {
++			regval &= ~(1 << index);
++			writeR(regval, phyaddr);
++			regval = readR(phyaddr);
++			if (wiringPiDebug)
++				printf("LOW val set over reg val: 0x%x\n", regval);
++		} else {
++			regval |= (1 << index);
++			writeR(regval, phyaddr);
++			regval = readR(phyaddr);
++			if (wiringPiDebug)
++				printf("HIGH val set over reg val: 0x%x\n", regval);
++		}
++
++	} 
++}
++
++/*
++ * CPi Digital Read
++ */
++int CPi_digitalRead(int pin)
++{
++	int bank = pin >> 5;
++	int index = pin - (bank << 5);
++	int val;
++	unsigned int phyaddr;
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++	if (bank >= 6) {
++		phyaddr = GPIOL_BASE + (bank -6) * 0x24 + 0x10;
++	} else {
++		phyaddr = GPIO_BASE_MAP + (bank * 0x24) + 0x10;
++	}
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++
++	if(bank == 0)
++		phyaddr = GPIO0_BASE + GPIO_EXT_PORTA_OFFSET;
++	else if(bank == 1)
++		phyaddr = GPIO1_BASE + GPIO_EXT_PORTA_OFFSET;
++	else if(bank == 2)
++		phyaddr = GPIO2_BASE + GPIO_EXT_PORTA_OFFSET;
++	else if(bank == 3)
++		phyaddr = GPIO3_BASE + GPIO_EXT_PORTA_OFFSET;
++	else if(bank == 4)
++		phyaddr = GPIO4_BASE + GPIO_EXT_PORTA_OFFSET;
++
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++		
++	phyaddr = GPIO_BASE_MAP + (bank * 0x30) + 0x10;
++	
++#endif
++
++	if (CPI_PIN_MASK[bank][index] != -1) {
++		val = readR(phyaddr);
++		val = val >> index;
++		val &= 1;
++		if (wiringPiDebug)
++			printf("Read reg val: 0x%#x, bank:%d, index:%d phyaddr: 0x%x\n", val, bank, index, phyaddr);
++		return val;
++	}
++	return 0;
++}
++
++
++int CPiSetup(int fd)
++{
++#ifdef CONFIG_CLOCKWORKPI_A04
++
++	gpio_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, GPIOA_BASE);
++	if ((int32_t)(unsigned long)gpio_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO) failed: %s\n", strerror(errno));
++	gpioL_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, GPIOL_BASE);
++	if ((int32_t)(unsigned long)gpioL_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO) failed: %s\n", strerror(errno));
++
++#elif defined(CONFIG_CLOCKWORKPI_A06)
++
++	gpio0_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPIO0_BASE);
++	if ((int32_t)(unsigned long)gpio0_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO0_BASE) failed: %s\n", strerror(errno));
++	gpio1_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPIO1_BASE);
++	if ((int32_t)(unsigned long)grf_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO1_BASE) failed: %s\n", strerror(errno));
++	gpio2_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPIO2_BASE);
++	if ((int32_t)(unsigned long)gpio2_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO2_BASE) failed: %s\n", strerror(errno));
++	gpio3_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPIO3_BASE);
++	if ((int32_t)(unsigned long)gpio3_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO3_BASE) failed: %s\n", strerror(errno));
++	gpio4_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPIO4_BASE);
++	if ((int32_t)(unsigned long)gpio4_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO4_BASE) failed: %s\n", strerror(errno));
++
++	cru_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, CRU_BASE);
++	if ((int32_t)(unsigned long)cru_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (CRU_BASE) failed: %s\n", strerror(errno));
++	pmucru_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, PMUCRU_BASE);
++	if ((int32_t)(unsigned long)pmucru_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (PMUCRU_BASE) failed: %s\n", strerror(errno));
++	grf_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GRF_BASE);
++	if ((int32_t)(unsigned long)grf_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GRF_BASE) failed: %s\n", strerror(errno));
++	pmugrf_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, PMUGRF_BASE);
++	if ((int32_t)(unsigned long)pmugrf_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (PMUGRF_BASE) failed: %s\n", strerror(errno));
++
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++
++	gpio_base = (uint32_t *)mmap(0, BLOCK_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, GPIOA_BASE);
++	if ((int32_t)(unsigned long)gpio_base == -1)
++		return wiringPiFailure(WPI_ALMOST, "wiringPiSetup: mmap (GPIO) failed: %s\n", strerror(errno));
++
++#endif
++	wpimode = WPI_MODE_BCM;
++}
++
++void CPiSetupRaw(void)
++{
++	wpimode = WPI_MODE_RAW;
++}
++
++void CPiPinMode(int pin, int mode)
++{
++	if (wiringPiDebug)
++		printf("CPiPinMode: pin:%d,mode:%d\n", pin, mode);
++
++	if (pin >= GPIO_NUM) {
++		printf("CPiPinMode: invaild pin:%d\n", pin);
++		return;
++	}
++
++	if (wpimode == WPI_MODE_BCM) {
++		if(pin >= sizeof(bcmToGpioCPi)/sizeof(bcmToGpioCPi[0])) {
++			printf("CPiPinMode: invaild pin:%d\n", pin);
++			return;
++		}
++		pin = bcmToGpioCPi[pin];
++	}
++
++	CPi_set_gpio_mode(pin, mode);
++}
++
++void CPiDigitalWrite(int pin, int value)
++{
++	if (wiringPiDebug)
++		printf("CPiDigitalWrite: pin:%d,value:%d\n", pin, value);
++
++	if (pin >= GPIO_NUM) {
++		printf("CPiDigitalWrite: invaild pin:%d\n", pin);
++		return;
++	}
++
++	if (wpimode == WPI_MODE_BCM) {
++		if(pin >= sizeof(bcmToGpioCPi)/sizeof(bcmToGpioCPi[0])) {
++			printf("CPiDigitalWrite: invaild pin:%d\n", pin);
++			return;
++		}
++		pin = bcmToGpioCPi[pin];
++	}
++
++	CPi_digitalWrite(pin, value);
++}
++
++int CPiDigitalRead(int pin)
++{
++	int value;
++
++	if (pin >= GPIO_NUM) {
++		printf("CPiDigitalRead: invaild pin:%d\n", pin);
++		return -1;
++	}
++
++	if (wpimode == WPI_MODE_BCM) {
++		if(pin >= sizeof(bcmToGpioCPi)/sizeof(bcmToGpioCPi[0])) {
++			printf("CPiDigitalRead: invaild pin:%d\n", pin);
++			return -1;
++		}
++		pin = bcmToGpioCPi[pin];
++	}
++
++	value = CPi_digitalRead(pin);
++
++	if (wiringPiDebug)
++		printf("CPiDigitalRead: pin:%d,value:%d\n", pin, value);
++
++	return value;
++}
++
++void pinModeAltCP(int pin, int mode)
++{
++}
++
++void CPiBoardId (int *model, int *rev, int *mem, int *maker, int *warranty)
++{
++#ifdef CONFIG_CLOCKWORKPI_A04
++	*model = CPI_MODEL_A04; 
++	*rev = PI_VERSION_1; 
++	*mem = 3;
++	*maker = 3;
++#elif defined(CONFIG_CLOCKWORKPI_A06)
++	*model = CPI_MODEL_A06; 
++	*rev = PI_VERSION_1; 
++	*mem = 4;
++	*maker = 3;
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++	*model = CPI_MODEL_D1; 
++	*rev = PI_VERSION_1; 
++	*mem = 2;
++	*maker = 3;
++#endif
++}
++
+diff --git a/wiringPi/wiringCPi.h b/wiringPi/wiringCPi.h
+new file mode 100755
+index 0000000..a4213d5
+--- /dev/null
++++ b/wiringPi/wiringCPi.h
+@@ -0,0 +1,45 @@
++#ifndef _WIRING_CPI_H
++#define _WIRING_CPI_H
++
++#ifdef CONFIG_CLOCKWORKPI_A04
++#define GPIOA_BASE		0x0300B000
++#define GPIO_BASE_MAP	(GPIOA_BASE + 0x24 * 2)
++#define GPIOL_BASE		(0x07022000)
++#define GPIO_NUM			(256)
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_A06
++#define GPIO0_BASE						0xff720000
++#define GPIO1_BASE						0xff730000
++#define GPIO2_BASE						0xff780000
++#define GPIO3_BASE						0xff788000
++#define GPIO4_BASE						0xff790000
++#define GPIO_SWPORTA_DR_OFFSET			0x00
++#define GPIO_SWPORTA_DDR_OFFSET		0x04
++#define GPIO_EXT_PORTA_OFFSET			0x50
++#define PMUGRF_BASE						0xff320000
++#define GRF_BASE							0xff77e000
++#define CRU_BASE							0xff760000
++#define PMUCRU_BASE						0xff750000
++#define CRU_CLKGATE_CON31_OFFSET		0x037c
++#define PMUCRU_CLKGATE_CON1_OFFSET		0x0104
++#define GPIO_NUM							(160)
++#endif
++
++#ifdef CONFIG_CLOCKWORKPI_D1
++#define GPIOA_BASE		0x02000000
++#define GPIO_BASE_MAP	(GPIOA_BASE + 0x30)
++#define GPIO_NUM			(256)
++#endif
++
++#define MAP_SIZE		(4*1024)
++#define MAP_MASK	(MAP_SIZE - 1)
++
++extern int CPi_set_gpio_mode(int pin, int mode);
++extern int CPi_set_gpio_alt(int pin, int mode);
++extern int CPi_get_gpio_mode(int pin);
++extern void CPi_digitalWrite(int pin, int value);
++extern int CPi_digitalRead(int pin);
++extern void CPiSetupRaw(void);
++
++#endif
+diff --git a/wiringPi/wiringPi.c b/wiringPi/wiringPi.c
+index 3db6866..d90960b 100644
+--- a/wiringPi/wiringPi.c
++++ b/wiringPi/wiringPi.c
+@@ -77,6 +77,10 @@
+ #include "wiringPi.h"
+ #include "../version.h"
+ 
++#ifdef CONFIG_CLOCKWORKPI
++#include "wiringCPi.h"
++#endif
++
+ // Environment Variables
+ 
+ #define	ENV_DEBUG	"WIRINGPI_DEBUG"
+@@ -237,9 +241,15 @@ const char *piModelNames [20] =
+   "Pi 3A+",	// 14
+   "Unknown15",	// 15
+   "CM3+",	// 16
+-  "Unknown17",	// 17
+-  "Unknown18",	// 18
+-  "Unknown19",	// 19
++#ifdef CONFIG_CLOCKWORKPI
++  "CPi A04",	// 17
++  "CPi A06",	// 18
++  "CPi D1",	// 19
++#else
++  "Unknown17",  // 17
++  "Unknown18",  // 18
++  "Unknown19",  // 19
++#endif
+ } ;
+ 
+ const char *piRevisionNames [16] =
+@@ -287,8 +297,8 @@ const int piMemorySize [8] =
+    256,		//	 0
+    512,		//	 1
+   1024,		//	 2
+-     0,		//	 3
+-     0,		//	 4
++  2048,		//	 3
++  4096,		//	 4
+      0,		//	 5
+      0,		//	 6
+      0,		//	 7
+@@ -725,7 +735,7 @@ static void usingGpioMemCheck (const char *what)
+  *********************************************************************************
+  */
+ 
+-static void piGpioLayoutOops (const char *why)
++void piGpioLayoutOops (const char *why)
+ {
+   fprintf (stderr, "Oops: Unable to determine board revision from /proc/cpuinfo\n") ;
+   fprintf (stderr, " -> %s\n", why) ;
+@@ -755,6 +765,14 @@ int piGpioLayout (void)
+     if (strncmp (line, "Hardware", 8) == 0)
+       break ;
+ 
++#ifdef CONFIG_CLOCKWORKPI_A06
++  strcpy(line, "Hardware		 : Rockchip rk3399 Family");
++#elif defined(CONFIG_CLOCKWORKPI_A04)
++  strcpy(line, "Hardware		 : Allwinner H6 Family");
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++  strcpy(line, "Hardware		 : Allwinner D1 Family");
++#endif
++
+   if (strncmp (line, "Hardware", 8) != 0)
+     piGpioLayoutOops ("No \"Hardware\" line") ;
+ 
+@@ -811,6 +829,10 @@ int piGpioLayout (void)
+ 
+   fclose (cpuFd) ;
+ 
++#ifdef CONFIG_CLOCKWORKPI
++	  strcpy(line, "Revision  : 0000");
++#endif
++
+   if (strncmp (line, "Revision", 8) != 0)
+     piGpioLayoutOops ("No \"Revision\" line") ;
+ 
+@@ -954,6 +976,11 @@ void piBoardId (int *model, int *rev, int *mem, int *maker, int *warranty)
+ //	Will deal with the properly later on - for now, lets just get it going...
+ //  unsigned int modelNum ;
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  CPiBoardId(model, rev, mem, maker);
++  return;
++#endif
++
+   (void)piGpioLayout () ;	// Call this first to make sure all's OK. Don't care about the result.
+ 
+   if ((cpuFd = fopen ("/proc/cpuinfo", "r")) == NULL)
+@@ -1420,6 +1447,11 @@ void pinMode (int pin, int mode)
+ 
+   setupCheck ("pinMode") ;
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  CPiPinMode(pin, mode);
++  return;
++#endif
++
+   if ((pin & PI_GPIO_MASK) == 0)		// On-board pin
+   {
+     /**/ if (wiringPiMode == WPI_MODE_PINS)
+@@ -1534,6 +1566,10 @@ int digitalRead (int pin)
+   char c ;
+   struct wiringPiNodeStruct *node = wiringPiNodes ;
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  return CPiDigitalRead(pin);
++#endif
++
+   if ((pin & PI_GPIO_MASK) == 0)		// On-Board Pin
+   {
+     /**/ if (wiringPiMode == WPI_MODE_GPIO_SYS)	// Sys mode
+@@ -1597,6 +1633,11 @@ void digitalWrite (int pin, int value)
+ {
+   struct wiringPiNodeStruct *node = wiringPiNodes ;
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  CPiDigitalWrite(pin, value);
++  return;
++#endif
++
+   if ((pin & PI_GPIO_MASK) == 0)		// On-Board Pin
+   {
+     /**/ if (wiringPiMode == WPI_MODE_GPIO_SYS)	// Sys mode
+@@ -2294,6 +2335,9 @@ int wiringPiSetup (void)
+ 	"  Try running with sudo?\n", strerror (errno)) ;
+   }
+ 
++#ifdef CONFIG_CLOCKWORKPI
++  CPiSetup(fd);
++#else
+ // Set the offsets into the memory interface.
+ 
+   GPIO_PADS 	  = piGpioBase + 0x00100000 ;
+@@ -2349,6 +2393,7 @@ int wiringPiSetup (void)
+   _wiringPiClk   = clk ;
+   _wiringPiPads  = pads ;
+   _wiringPiTimer = timer ;
++#endif
+ 
+   initialiseEpoch () ;
+ 
+@@ -2377,6 +2422,19 @@ int wiringPiSetupGpio (void)
+   return 0 ;
+ }
+ 
++int wiringPiSetupRaw (void)
++{
++  (void)wiringPiSetup () ;
++
++  if (wiringPiDebug)
++    printf ("wiringPi: wiringPiSetupRaw called\n") ;
++
++  wiringPiMode = WPI_MODE_GPIO ;
++#ifdef CONFIG_CLOCKWORKPI
++  CPiSetupRaw();
++#endif
++  return 0 ;
++}
+ 
+ /*
+  * wiringPiSetupPhys:
+diff --git a/wiringPi/wiringPi.h b/wiringPi/wiringPi.h
+index 0ff0c92..ffda745 100644
+--- a/wiringPi/wiringPi.h
++++ b/wiringPi/wiringPi.h
+@@ -44,6 +44,10 @@
+ 
+ // Handy defines
+ 
++#ifdef CONFIG_CLOCKWORKPI
++extern int wiringPiDebug;
++#endif
++
+ // wiringPi modes
+ 
+ #define	WPI_MODE_PINS		 0
+@@ -102,7 +106,11 @@
+ #define	PI_MODEL_3BP 		13
+ #define	PI_MODEL_3AP 		14
+ #define	PI_MODEL_CM3P 		16
+-
++#ifdef CONFIG_CLOCKWORKPI
++#define	CPI_MODEL_A04   0xa4
++#define	CPI_MODEL_A06   0xa6
++#define	CPI_MODEL_D1   0xd1
++#endif
+ #define	PI_VERSION_1		0
+ #define	PI_VERSION_1_1		1
+ #define	PI_VERSION_1_2		2
+@@ -187,6 +195,10 @@ extern "C" {
+ 
+ // Internal
+ 
++#ifdef CONFIG_CLOCKWORKPI
++extern void piGpioLayoutOops (const char *why);
++#endif
++
+ extern int wiringPiFailure (int fatal, const char *message, ...) ;
+ 
+ // Core wiringPi functions
+diff --git a/wiringPi/wiringPiSPI.c b/wiringPi/wiringPiSPI.c
+index 749c8fe..1ce6880 100644
+--- a/wiringPi/wiringPiSPI.c
++++ b/wiringPi/wiringPiSPI.c
+@@ -109,7 +109,13 @@ int wiringPiSPISetupMode (int channel, int speed, int mode)
+ // Channel can be anything - lets hope for the best
+ //  channel &= 1 ;	// Channel is 0 or 1
+ 
++#ifdef CONFIG_CLOCKWORKPI_A06
++  snprintf (spiDev, 31, "/dev/spidev2.%d", channel) ;
++#elif defined(CONFIG_CLOCKWORKPI_D1)
++  snprintf (spiDev, 31, "/dev/spidev1.%d", channel) ;
++#else
+   snprintf (spiDev, 31, "/dev/spidev0.%d", channel) ;
++#endif
+ 
+   if ((fd = open (spiDev, O_RDWR)) < 0)
+     return wiringPiFailure (WPI_ALMOST, "Unable to open SPI device: %s\n", strerror (errno)) ;
+diff --git a/wiringPiD/drcNetCmd.h b/wiringPiD/drcNetCmd.h
+index 23f7dc1..4300396 100644
+--- a/wiringPiD/drcNetCmd.h
++++ b/wiringPiD/drcNetCmd.h
+@@ -35,7 +35,7 @@
+ #define	DRCN_ANALOG_READ	9
+ 
+ 
+-struct drcNetComStruct
++typedef struct drcNetComStruct
+ {
+   uint32_t pin ;
+   uint32_t cmd ;