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correct a Small Code Problem Concerning Databus

Godzil 9 years ago
parent
commit
bbbc52e854
1 changed files with 2 additions and 2 deletions
  1. 2 2
      WonderMadeleine.vhd

+ 2 - 2
WonderMadeleine.vhd

@@ -74,7 +74,7 @@ use IEEE.NUMERIC_STD.ALL;
 
 entity WonderMadeleine is
     port(
-        D_BUS:   inout std_logic_vector( 7 downto  0);      -- 16 bit Data bus
+        D_BUS:   inout std_logic_vector( 7 downto  0);      -- Lower part of the 16 bit Data bus
         A_BUS_H: in    std_logic_vector(19 downto 16);      -- High part of 20 bit Address bus
         A_BUS_L: in    std_logic_vector( 3 downto  0);      -- Low part of 20 bit Address bus
 
@@ -395,4 +395,4 @@ end architecture;
 -- force -freeze sim:/wondermadeleine/nRD 1 750
 -- force -freeze sim:/wondermadeleine/nSEL 1 760
 
--- run
+-- run