u8g_dev_ili9325d_320x240.c 13 KB

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  1. /*
  2. u8g_dev_ili9325d_320x240.c
  3. Universal 8bit Graphics Library
  4. Copyright (c) 2011, olikraus@gmail.com
  5. All rights reserved.
  6. Redistribution and use in source and binary forms, with or without modification,
  7. are permitted provided that the following conditions are met:
  8. * Redistributions of source code must retain the above copyright notice, this list
  9. of conditions and the following disclaimer.
  10. * Redistributions in binary form must reproduce the above copyright notice, this
  11. list of conditions and the following disclaimer in the documentation and/or other
  12. materials provided with the distribution.
  13. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  14. CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  15. INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  18. CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  19. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  23. STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  25. ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. Color format
  27. Red: 5 Bit
  28. Green: 6 Bit
  29. Blue: 5 Bit
  30. */
  31. #include "u8g.h"
  32. #define WIDTH 240
  33. #if defined(U8G_16BIT)
  34. #define HEIGHT 320
  35. #else
  36. /* if the user tries to compile the 8Bit version of the lib, then restrict the height to something which fits to 8Bit */
  37. #define HEIGHT 240
  38. #endif
  39. #define PAGE_HEIGHT 4
  40. /*
  41. reference board for this device:
  42. http://iteadstudio.com/store/index.php?main_page=product_info&cPath=57_58&products_id=55
  43. documentation:
  44. http://iteadstudio.com/Downloadfile/ITDB02_material.rar
  45. datasheet
  46. http://www.newhavendisplay.com/app_notes/ILI9325D.pdf
  47. other libs
  48. http://henningkarlsen.com/electronics/library.php
  49. init sequence
  50. http://code.google.com/p/itdb02/, ITDB02.cpp, iteadstudio.com
  51. */
  52. static const uint8_t u8g_dev_ili9325d_320x240_init_seq[] PROGMEM = {
  53. U8G_ESC_CS(0), /* disable chip */
  54. U8G_ESC_DLY(50), /* delay 50 ms */
  55. U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
  56. U8G_ESC_DLY(50), /* delay 50 ms */
  57. U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
  58. U8G_ESC_DLY(50), /* delay 50 ms */
  59. U8G_ESC_CS(1), /* enable chip */
  60. U8G_ESC_DLY(50), /* delay 50 ms */
  61. //U8G_ESC_ADR(0), 0x000, 0x0E5, /* only used for none D version: set SRAM internal timing */
  62. //U8G_ESC_ADR(1), 0x078, 0x0f0,
  63. U8G_ESC_ADR(0), 0x000, 0x001, /* Driver Output Control, bits 8 & 10 */
  64. U8G_ESC_ADR(1), 0x001, 0x000,
  65. U8G_ESC_ADR(0), 0x000, 0x002, /* LCD Driving Wave Control, bit 9: Set line inversion */
  66. U8G_ESC_ADR(1), 0x002, 0x000, /* ITDB02 none D verion: 0x007, 0x000 */
  67. U8G_ESC_ADR(0), 0x000, 0x003, /* Entry Mode, GRAM write direction and BGR=1 */
  68. U8G_ESC_ADR(1), 0x010, 0x030,
  69. U8G_ESC_ADR(0), 0x000, 0x004, /* Resize register */
  70. U8G_ESC_ADR(1), 0x000, 0x000,
  71. U8G_ESC_ADR(0), 0x000, 0x008, /* Display Control 2: set the back porch and front porch */
  72. U8G_ESC_ADR(1), 0x002, 0x007,
  73. U8G_ESC_ADR(0), 0x000, 0x009, /* Display Control 3 */
  74. U8G_ESC_ADR(1), 0x000, 0x000,
  75. U8G_ESC_ADR(0), 0x000, 0x00a, /* Display Control 4: FMARK */
  76. U8G_ESC_ADR(1), 0x000, 0x000,
  77. U8G_ESC_ADR(0), 0x000, 0x00c, /* RGB Display Interface Control 1 */
  78. U8G_ESC_ADR(1), 0x000, 0x000,
  79. U8G_ESC_ADR(0), 0x000, 0x00d, /* Frame Maker Position */
  80. U8G_ESC_ADR(1), 0x000, 0x000,
  81. U8G_ESC_ADR(0), 0x000, 0x00f, /* RGB Display Interface Control 2 */
  82. U8G_ESC_ADR(1), 0x000, 0x000,
  83. U8G_ESC_ADR(0), 0x000, 0x010, /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
  84. U8G_ESC_ADR(1), 0x000, 0x000,
  85. U8G_ESC_ADR(0), 0x000, 0x011, /* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
  86. U8G_ESC_ADR(1), 0x000, 0x007,
  87. U8G_ESC_ADR(0), 0x000, 0x012, /* Power Control 3: VREG1OUT voltage */
  88. U8G_ESC_ADR(1), 0x000, 0x000,
  89. U8G_ESC_ADR(0), 0x000, 0x013, /* Power Control 4: VDV[4:0] for VCOM amplitude */
  90. U8G_ESC_ADR(1), 0x000, 0x000,
  91. U8G_ESC_ADR(0), 0x000, 0x007, /* Display Control 1: Operate, but do not display */
  92. U8G_ESC_ADR(1), 0x000, 0x001,
  93. U8G_ESC_DLY(100), /* delay 100 ms */ /* ITDB02 none D verion: 50ms */
  94. U8G_ESC_DLY(100), /* delay 100 ms */
  95. U8G_ESC_ADR(0), 0x000, 0x010, /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
  96. U8G_ESC_ADR(1), 0x016, 0x090, /* ITDB02 none D verion: 0x010, 0x090 */
  97. U8G_ESC_ADR(0), 0x000, 0x011, /* Power Control 2: SAP, BT[3:0], AP, DSTB, SLP, STB */
  98. U8G_ESC_ADR(1), 0x002, 0x027,
  99. U8G_ESC_DLY(50), /* delay 50 ms */
  100. U8G_ESC_ADR(0), 0x000, 0x012, /* Power Control 3: VCI: External, VCI*1.80 */
  101. U8G_ESC_ADR(1), 0x000, 0x00d, /* ITDB02 none D verion: 0x000, 0x01f */
  102. U8G_ESC_DLY(50), /* delay 50 ms */
  103. U8G_ESC_ADR(0), 0x000, 0x013, /* Power Control 4: VDV[4:0] for VCOM amplitude */
  104. U8G_ESC_ADR(1), 0x012, 0x000, /* ITDB02 none D verion: 0x015, 0x000 */
  105. U8G_ESC_ADR(0), 0x000, 0x029, /* Power Control 7 */
  106. U8G_ESC_ADR(1), 0x000, 0x00a, /* ITDB02 none D verion: 0x000, 0x027 */
  107. U8G_ESC_ADR(0), 0x000, 0x02b, /* Frame Rate: 83 */
  108. U8G_ESC_ADR(1), 0x000, 0x00d,
  109. U8G_ESC_DLY(50), /* delay 50 ms */
  110. U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
  111. U8G_ESC_ADR(1), 0x000, 0x000,
  112. U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
  113. U8G_ESC_ADR(1), 0x000, 0x000,
  114. /* gamma control */
  115. U8G_ESC_ADR(0), 0x000, 0x030,
  116. U8G_ESC_ADR(1), 0x000, 0x000,
  117. U8G_ESC_ADR(0), 0x000, 0x031,
  118. U8G_ESC_ADR(1), 0x004, 0x004,
  119. U8G_ESC_ADR(0), 0x000, 0x032,
  120. U8G_ESC_ADR(1), 0x000, 0x003,
  121. U8G_ESC_ADR(0), 0x000, 0x035,
  122. U8G_ESC_ADR(1), 0x004, 0x005,
  123. U8G_ESC_ADR(0), 0x000, 0x036,
  124. U8G_ESC_ADR(1), 0x008, 0x008,
  125. U8G_ESC_ADR(0), 0x000, 0x037,
  126. U8G_ESC_ADR(1), 0x004, 0x007,
  127. U8G_ESC_ADR(0), 0x000, 0x038,
  128. U8G_ESC_ADR(1), 0x003, 0x003,
  129. U8G_ESC_ADR(0), 0x000, 0x039,
  130. U8G_ESC_ADR(1), 0x007, 0x007,
  131. U8G_ESC_ADR(0), 0x000, 0x03c,
  132. U8G_ESC_ADR(1), 0x005, 0x004,
  133. U8G_ESC_ADR(0), 0x000, 0x03d,
  134. U8G_ESC_ADR(1), 0x008, 0x008,
  135. U8G_ESC_ADR(0), 0x000, 0x050, /* Horizontal GRAM Start Address */
  136. U8G_ESC_ADR(1), 0x000, 0x000,
  137. U8G_ESC_ADR(0), 0x000, 0x051, /* Horizontal GRAM End Address: 239 */
  138. U8G_ESC_ADR(1), 0x000, 0x0EF,
  139. U8G_ESC_ADR(0), 0x000, 0x052, /* Vertical GRAM Start Address */
  140. U8G_ESC_ADR(1), 0x000, 0x000,
  141. U8G_ESC_ADR(0), 0x000, 0x053, /* Vertical GRAM End Address: 319 */
  142. U8G_ESC_ADR(1), 0x001, 0x03F,
  143. U8G_ESC_ADR(0), 0x000, 0x060, /* Driver Output Control 2 */
  144. U8G_ESC_ADR(1), 0x0a7, 0x000,
  145. U8G_ESC_ADR(0), 0x000, 0x061, /* Base Image Display Control: NDL,VLE, REV */
  146. U8G_ESC_ADR(1), 0x000, 0x001,
  147. U8G_ESC_ADR(0), 0x000, 0x06a, /* Vertical Scroll Control */
  148. U8G_ESC_ADR(1), 0x000, 0x000,
  149. U8G_ESC_ADR(0), 0x000, 0x080, /* Partial Image 1 Display Position */
  150. U8G_ESC_ADR(1), 0x000, 0x000,
  151. U8G_ESC_ADR(0), 0x000, 0x081, /* Partial Image 1 RAM Start Address */
  152. U8G_ESC_ADR(1), 0x000, 0x000,
  153. U8G_ESC_ADR(0), 0x000, 0x082, /* Partial Image 1 RAM End Address */
  154. U8G_ESC_ADR(1), 0x000, 0x000,
  155. U8G_ESC_ADR(0), 0x000, 0x083, /* Partial Image 2 Display Position */
  156. U8G_ESC_ADR(1), 0x000, 0x000,
  157. U8G_ESC_ADR(0), 0x000, 0x084, /* Partial Image 2 RAM Start Address */
  158. U8G_ESC_ADR(1), 0x000, 0x000,
  159. U8G_ESC_ADR(0), 0x000, 0x085, /* Partial Image 2 RAM End Address */
  160. U8G_ESC_ADR(1), 0x000, 0x000,
  161. U8G_ESC_ADR(0), 0x000, 0x090, /* Panel Interface Control 1 */
  162. U8G_ESC_ADR(1), 0x000, 0x010,
  163. U8G_ESC_ADR(0), 0x000, 0x092, /* Panel Interface Control 2 */
  164. U8G_ESC_ADR(1), 0x000, 0x000, /* 0x006, 0x000 */
  165. U8G_ESC_ADR(0), 0x000, 0x007, /* Display Control 1: Operate, display ON */
  166. U8G_ESC_ADR(1), 0x001, 0x033,
  167. U8G_ESC_DLY(10), /* delay 10 ms */
  168. /* write test pattern */
  169. U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
  170. U8G_ESC_ADR(1), 0x000, 0x000,
  171. U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
  172. U8G_ESC_ADR(1), 0x000, 0x010,
  173. U8G_ESC_ADR(0), 0x000, 0x022, /* Write Data to GRAM */
  174. U8G_ESC_ADR(1), 0x0fe, 0x0fe,
  175. 0x000, 0x000,
  176. 0x0fe, 0x0fe,
  177. 0x000, 0x000,
  178. 0x0fe, 0x0fe,
  179. 0x000, 0x000,
  180. 0x0fe, 0x0fe,
  181. 0x000, 0x000,
  182. 0x0fe, 0x0fe,
  183. 0x000, 0x000,
  184. 0x0fe, 0x0fe,
  185. 0x000, 0x000,
  186. 0x0fe, 0x0fe,
  187. 0x000, 0x000,
  188. 0x0fe, 0x0fe,
  189. 0x000, 0x000,
  190. 0x0fe, 0x0fe,
  191. U8G_ESC_CS(0), /* disable chip */
  192. U8G_ESC_END /* end of sequence */
  193. };
  194. static const uint8_t u8g_dev_ili9325d_320x240_page_seq[] PROGMEM = {
  195. U8G_ESC_CS(1), /* enable chip */
  196. U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
  197. U8G_ESC_ADR(1), 0x000, 0x000,
  198. U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
  199. U8G_ESC_ADR(1),
  200. U8G_ESC_END /* end of sequence */
  201. };
  202. /* convert the internal RGB 332 to 65K high byte */
  203. static uint8_t u8g_dev_ili9325d_get_65K_high_byte(uint8_t color)
  204. {
  205. uint8_t h;
  206. h = color;
  207. h &= 0x0e0;
  208. h |= h>>3;
  209. h &= 0x0f8;
  210. color>>=2;
  211. color &= 7;
  212. h |= color;
  213. return h;
  214. }
  215. /* convert the internal RGB 332 to 65K high byte */
  216. static uint8_t u8g_dev_ili9325d_get_65K_low_byte(uint8_t color)
  217. {
  218. uint8_t l;
  219. l = color;
  220. l <<= 3;
  221. color &= 3;
  222. color <<= 1;
  223. l |= color;
  224. return l;
  225. }
  226. uint8_t u8g_dev_ili9325d_320x240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
  227. {
  228. switch(msg)
  229. {
  230. case U8G_DEV_MSG_INIT:
  231. u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
  232. //for(;;)
  233. u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_init_seq);
  234. break;
  235. case U8G_DEV_MSG_STOP:
  236. break;
  237. case U8G_DEV_MSG_PAGE_NEXT:
  238. {
  239. uint8_t i;
  240. uint16_t y, j;
  241. uint8_t *ptr;
  242. u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
  243. y = pb->p.page_y0;
  244. ptr = pb->buf;
  245. for( i = 0; i < pb->p.page_height; i ++ )
  246. {
  247. u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_page_seq);
  248. u8g_WriteByte(u8g, dev, y >> 8 ); /* display ram (cursor) address high byte */
  249. u8g_WriteByte(u8g, dev, y & 255 ); /* display ram (cursor) address low byte */
  250. u8g_SetAddress(u8g, dev, 0); /* cmd mode */
  251. u8g_WriteByte(u8g, dev, 0 );
  252. u8g_WriteByte(u8g, dev, 0x022 ); /* start gram data */
  253. u8g_SetAddress(u8g, dev, 1); /* data mode */
  254. for( j = 0; j < pb->width; j++ )
  255. {
  256. u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_high_byte(*ptr) );
  257. u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_low_byte(*ptr) );
  258. ptr++;
  259. }
  260. y++;
  261. }
  262. u8g_SetChipSelect(u8g, dev, 0);
  263. }
  264. break;
  265. }
  266. return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg);
  267. }
  268. uint8_t u8g_ili9325d_320x240_8h8_buf[WIDTH*PAGE_HEIGHT] U8G_NOCOMMON ;
  269. u8g_pb_t u8g_ili9325d_320x240_8h8_pb U8G_NOCOMMON = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_ili9325d_320x240_8h8_buf};
  270. u8g_dev_t u8g_dev_ili9325d_320x240_8bit U8G_NOCOMMON = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_port_d_wr_fn };
  271. //u8g_dev_t u8g_dev_ili9325d_320x240_8bit = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_parallel_fn };
  272. //U8G_PB_DEV(u8g_dev_ili9325d_320x240_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ili9325d_320x240_fn, U8G_COM_PARALLEL);