pico.c 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244
  1. /*
  2. * PicoDrive
  3. * (C) notaz, 2007
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../sound/ym2612.h"
  10. extern unsigned char formatted_bram[4*0x10];
  11. extern unsigned int s68k_poll_adclk;
  12. void (*PicoMCDopenTray)(void) = NULL;
  13. void (*PicoMCDcloseTray)(void) = NULL;
  14. PICO_INTERNAL void PicoInitMCD(void)
  15. {
  16. SekInitS68k();
  17. Init_CD_Driver();
  18. }
  19. PICO_INTERNAL void PicoExitMCD(void)
  20. {
  21. End_CD_Driver();
  22. }
  23. PICO_INTERNAL void PicoPowerMCD(void)
  24. {
  25. int fmt_size = sizeof(formatted_bram);
  26. memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
  27. memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
  28. memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
  29. memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
  30. memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
  31. }
  32. PICO_INTERNAL int PicoResetMCD(void)
  33. {
  34. memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
  35. memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
  36. memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
  37. *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
  38. Pico_mcd->m.state_flags |= 1; // s68k reset pending
  39. Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
  40. Reset_CD();
  41. LC89510_Reset();
  42. gfx_cd_reset();
  43. #ifdef _ASM_CD_MEMORY_C
  44. //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
  45. #endif
  46. // use SRam.data for RAM cart
  47. if (PicoOpt & POPT_EN_MCD_RAMCART) {
  48. if (SRam.data == NULL)
  49. SRam.data = calloc(1, 0x12000);
  50. }
  51. else if (SRam.data != NULL) {
  52. free(SRam.data);
  53. SRam.data = NULL;
  54. }
  55. SRam.start = SRam.end = 0; // unused
  56. return 0;
  57. }
  58. static __inline void SekRunM68k(int cyc)
  59. {
  60. int cyc_do;
  61. pprof_start(m68k);
  62. SekCycleAim+=cyc;
  63. if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
  64. #if defined(EMU_CORE_DEBUG)
  65. SekCycleCnt+=CM_compareRun(cyc_do, 0);
  66. #elif defined(EMU_C68K)
  67. PicoCpuCM68k.cycles=cyc_do;
  68. CycloneRun(&PicoCpuCM68k);
  69. SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
  70. #elif defined(EMU_M68K)
  71. m68k_set_context(&PicoCpuMM68k);
  72. SekCycleCnt+=m68k_execute(cyc_do);
  73. #elif defined(EMU_F68K)
  74. g_m68kcontext=&PicoCpuFM68k;
  75. SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
  76. #endif
  77. pprof_end(m68k);
  78. }
  79. static __inline void SekRunS68k(int cyc)
  80. {
  81. int cyc_do;
  82. SekCycleAimS68k+=cyc;
  83. if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
  84. #if defined(EMU_CORE_DEBUG)
  85. SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
  86. #elif defined(EMU_C68K)
  87. PicoCpuCS68k.cycles=cyc_do;
  88. CycloneRun(&PicoCpuCS68k);
  89. SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
  90. #elif defined(EMU_M68K)
  91. m68k_set_context(&PicoCpuMS68k);
  92. SekCycleCntS68k+=m68k_execute(cyc_do);
  93. #elif defined(EMU_F68K)
  94. g_m68kcontext=&PicoCpuFS68k;
  95. SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
  96. #endif
  97. }
  98. #define PS_STEP_M68K ((488<<16)/20) // ~24
  99. //#define PS_STEP_S68K 13
  100. #if defined(_ASM_CD_PICO_C)
  101. extern void SekRunPS(int cyc_m68k, int cyc_s68k);
  102. #elif defined(EMU_F68K)
  103. static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
  104. {
  105. SekCycleAim+=cyc_m68k;
  106. SekCycleAimS68k+=cyc_s68k;
  107. fm68k_emulate(0, 1, 0);
  108. }
  109. #else
  110. static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
  111. {
  112. int cycn, cycn_s68k, cyc_do;
  113. SekCycleAim+=cyc_m68k;
  114. SekCycleAimS68k+=cyc_s68k;
  115. // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
  116. // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
  117. /* loop 488 downto 0 in steps of PS_STEP */
  118. for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
  119. {
  120. cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
  121. if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
  122. #if defined(EMU_C68K)
  123. PicoCpuCM68k.cycles = cyc_do;
  124. CycloneRun(&PicoCpuCM68k);
  125. SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
  126. #elif defined(EMU_M68K)
  127. m68k_set_context(&PicoCpuMM68k);
  128. SekCycleCnt += m68k_execute(cyc_do);
  129. #elif defined(EMU_F68K)
  130. g_m68kcontext = &PicoCpuFM68k;
  131. SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
  132. #endif
  133. }
  134. if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
  135. #if defined(EMU_C68K)
  136. PicoCpuCS68k.cycles = cyc_do;
  137. CycloneRun(&PicoCpuCS68k);
  138. SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
  139. #elif defined(EMU_M68K)
  140. m68k_set_context(&PicoCpuMS68k);
  141. SekCycleCntS68k += m68k_execute(cyc_do);
  142. #elif defined(EMU_F68K)
  143. g_m68kcontext = &PicoCpuFS68k;
  144. SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
  145. #endif
  146. }
  147. }
  148. }
  149. #endif
  150. static __inline void check_cd_dma(void)
  151. {
  152. int ddx;
  153. if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
  154. ddx = Pico_mcd->s68k_regs[4] & 7;
  155. if (ddx < 2) return; // invalid
  156. if (ddx < 4) {
  157. Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
  158. return;
  159. }
  160. if (ddx == 6) return; // invalid
  161. Update_CDC_TRansfer(ddx); // now go and do the actual transfer
  162. }
  163. static __inline void update_chips(void)
  164. {
  165. int counter_timer, int3_set;
  166. int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
  167. // 75Hz CDC update
  168. if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
  169. Pico_mcd->m.counter75hz -= counter75hz_lim;
  170. Check_CD_Command();
  171. }
  172. // update timers
  173. counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
  174. Pico_mcd->m.timer_stopwatch += counter_timer;
  175. if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
  176. Pico_mcd->m.timer_int3 -= counter_timer;
  177. if (Pico_mcd->m.timer_int3 < 0) {
  178. if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
  179. elprintf(EL_INTS, "s68k: timer irq 3");
  180. SekInterruptS68k(3);
  181. Pico_mcd->m.timer_int3 += int3_set << 16;
  182. }
  183. // is this really what happens if irq3 is masked out?
  184. Pico_mcd->m.timer_int3 &= 0xffffff;
  185. }
  186. }
  187. // update gfx chip
  188. if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
  189. gfx_cd_update();
  190. }
  191. #define PICO_CD
  192. #define CPUS_RUN(m68k_cycles,s68k_cycles) \
  193. { \
  194. if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
  195. SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
  196. } else { \
  197. SekRunM68k(m68k_cycles); \
  198. if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
  199. SekRunS68k(s68k_cycles); \
  200. } \
  201. }
  202. #include "../pico_cmn.c"
  203. PICO_INTERNAL void PicoFrameMCD(void)
  204. {
  205. if (!(PicoOpt&POPT_ALT_RENDERER))
  206. PicoFrameStart();
  207. PicoFrameHints();
  208. }