memory.c 36 KB

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  1. /*
  2. * Memory I/O handlers for Sega/Mega CD.
  3. * (C) notaz, 2007-2009
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../memory.h"
  10. #include "gfx_cd.h"
  11. #include "pcm.h"
  12. uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  13. uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  14. uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  15. uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  16. MAKE_68K_READ8(s68k_read8, s68k_read8_map)
  17. MAKE_68K_READ16(s68k_read16, s68k_read16_map)
  18. MAKE_68K_READ32(s68k_read32, s68k_read16_map)
  19. MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
  20. MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
  21. MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
  22. // -----------------------------------------------------------------
  23. // provided by ASM code:
  24. #ifdef _ASM_CD_MEMORY_C
  25. u32 PicoReadM68k8_io(u32 a);
  26. u32 PicoReadM68k16_io(u32 a);
  27. void PicoWriteM68k8_io(u32 a, u32 d);
  28. void PicoWriteM68k16_io(u32 a, u32 d);
  29. u32 PicoReadS68k8_pr(u32 a);
  30. u32 PicoReadS68k16_pr(u32 a);
  31. void PicoWriteS68k8_pr(u32 a, u32 d);
  32. void PicoWriteS68k16_pr(u32 a, u32 d);
  33. u32 PicoReadM68k8_cell0(u32 a);
  34. u32 PicoReadM68k8_cell1(u32 a);
  35. u32 PicoReadM68k16_cell0(u32 a);
  36. u32 PicoReadM68k16_cell1(u32 a);
  37. void PicoWriteM68k8_cell0(u32 a, u32 d);
  38. void PicoWriteM68k8_cell1(u32 a, u32 d);
  39. void PicoWriteM68k16_cell0(u32 a, u32 d);
  40. void PicoWriteM68k16_cell1(u32 a, u32 d);
  41. u32 PicoReadS68k8_dec0(u32 a);
  42. u32 PicoReadS68k8_dec1(u32 a);
  43. u32 PicoReadS68k16_dec0(u32 a);
  44. u32 PicoReadS68k16_dec1(u32 a);
  45. void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
  46. void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
  47. void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
  48. void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
  49. void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
  50. void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
  51. void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
  52. void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
  53. void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
  54. void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
  55. void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
  56. void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
  57. #endif
  58. static void remap_prg_window(void);
  59. static void remap_word_ram(int r3);
  60. // poller detection
  61. #define POLL_LIMIT 16
  62. #define POLL_CYCLES 124
  63. unsigned int s68k_poll_adclk, s68k_poll_cnt;
  64. #ifndef _ASM_CD_MEMORY_C
  65. static u32 m68k_reg_read16(u32 a)
  66. {
  67. u32 d=0;
  68. a &= 0x3e;
  69. switch (a) {
  70. case 0:
  71. d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
  72. goto end;
  73. case 2:
  74. d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
  75. elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
  76. goto end;
  77. case 4:
  78. d = Pico_mcd->s68k_regs[4]<<8;
  79. goto end;
  80. case 6:
  81. d = *(u16 *)(Pico_mcd->bios + 0x72);
  82. goto end;
  83. case 8:
  84. d = Read_CDC_Host(0);
  85. goto end;
  86. case 0xA:
  87. elprintf(EL_UIO, "m68k FIXME: reserved read");
  88. goto end;
  89. case 0xC:
  90. d = Pico_mcd->m.timer_stopwatch >> 16;
  91. elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
  92. goto end;
  93. }
  94. if (a < 0x30) {
  95. // comm flag/cmd/status (0xE-0x2F)
  96. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  97. goto end;
  98. }
  99. elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
  100. end:
  101. return d;
  102. }
  103. #endif
  104. #ifndef _ASM_CD_MEMORY_C
  105. static
  106. #endif
  107. void m68k_reg_write8(u32 a, u32 d)
  108. {
  109. u32 dold;
  110. a &= 0x3f;
  111. switch (a) {
  112. case 0:
  113. d &= 1;
  114. if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
  115. return;
  116. case 1:
  117. d &= 3;
  118. if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
  119. if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
  120. if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
  121. if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
  122. SekResetS68k(); // S68k comes out of RESET or BRQ state
  123. Pico_mcd->m.state_flags&=~1;
  124. elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);
  125. }
  126. if (!(d & 1))
  127. d |= 2; // verified: reset also gives bus
  128. if ((d ^ Pico_mcd->m.busreq) & 2)
  129. remap_prg_window();
  130. Pico_mcd->m.busreq = d;
  131. return;
  132. case 2:
  133. elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
  134. Pico_mcd->s68k_regs[2] = d; // really use s68k side register
  135. return;
  136. case 3:
  137. dold = Pico_mcd->s68k_regs[3];
  138. elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
  139. //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
  140. //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
  141. // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
  142. if (dold & 4) { // 1M mode
  143. d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
  144. } else {
  145. if ((d ^ dold) & d & 2) { // DMNA is being set
  146. dold &= ~1; // return word RAM to s68k
  147. /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
  148. SekEndRun(20+16+10+12+16);
  149. }
  150. }
  151. Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);
  152. if ((d ^ dold) & 0xc0) {
  153. elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
  154. remap_prg_window();
  155. }
  156. #ifdef USE_POLL_DETECT
  157. if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
  158. SekSetStopS68k(0); s68k_poll_adclk = 0;
  159. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  160. }
  161. #endif
  162. return;
  163. case 6:
  164. Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
  165. return;
  166. case 7:
  167. Pico_mcd->bios[0x72] = d;
  168. elprintf(EL_CDREGS, "hint vector set to %04x%04x",
  169. ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
  170. return;
  171. case 0xf:
  172. d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
  173. case 0xe:
  174. //dprintf("m68k: comm flag: %02x", d);
  175. Pico_mcd->s68k_regs[0xe] = d;
  176. #ifdef USE_POLL_DETECT
  177. if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
  178. SekSetStopS68k(0); s68k_poll_adclk = 0;
  179. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  180. }
  181. #endif
  182. return;
  183. }
  184. if ((a&0xf0) == 0x10) {
  185. Pico_mcd->s68k_regs[a] = d;
  186. #ifdef USE_POLL_DETECT
  187. if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
  188. SekSetStopS68k(0); s68k_poll_adclk = 0;
  189. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  190. }
  191. #endif
  192. return;
  193. }
  194. elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
  195. }
  196. #ifndef _ASM_CD_MEMORY_C
  197. static
  198. #endif
  199. u32 s68k_poll_detect(u32 a, u32 d)
  200. {
  201. #ifdef USE_POLL_DETECT
  202. // needed mostly for Cyclone, which doesn't always check it's cycle counter
  203. if (SekIsStoppedS68k()) return d;
  204. // polling detection
  205. if (a == (s68k_poll_adclk&0xff)) {
  206. unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
  207. if (clkdiff <= POLL_CYCLES) {
  208. s68k_poll_cnt++;
  209. //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
  210. if (s68k_poll_cnt > POLL_LIMIT) {
  211. SekSetStopS68k(1);
  212. elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
  213. }
  214. s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
  215. return d;
  216. }
  217. }
  218. s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
  219. s68k_poll_cnt = 0;
  220. #endif
  221. return d;
  222. }
  223. #define READ_FONT_DATA(basemask) \
  224. { \
  225. unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
  226. unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
  227. if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
  228. if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
  229. if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
  230. if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
  231. }
  232. #ifndef _ASM_CD_MEMORY_C
  233. static
  234. #endif
  235. u32 s68k_reg_read16(u32 a)
  236. {
  237. u32 d=0;
  238. switch (a) {
  239. case 0:
  240. return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
  241. case 2:
  242. d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
  243. elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
  244. return s68k_poll_detect(a, d);
  245. case 6:
  246. return CDC_Read_Reg();
  247. case 8:
  248. return Read_CDC_Host(1); // Gens returns 0 here on byte reads
  249. case 0xC:
  250. d = Pico_mcd->m.timer_stopwatch >> 16;
  251. elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
  252. return d;
  253. case 0x30:
  254. elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
  255. return Pico_mcd->s68k_regs[31];
  256. case 0x34: // fader
  257. return 0; // no busy bit
  258. case 0x50: // font data (check: Lunar 2, Silpheed)
  259. READ_FONT_DATA(0x00100000);
  260. return d;
  261. case 0x52:
  262. READ_FONT_DATA(0x00010000);
  263. return d;
  264. case 0x54:
  265. READ_FONT_DATA(0x10000000);
  266. return d;
  267. case 0x56:
  268. READ_FONT_DATA(0x01000000);
  269. return d;
  270. }
  271. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  272. if (a >= 0x0e && a < 0x30)
  273. return s68k_poll_detect(a, d);
  274. return d;
  275. }
  276. #ifndef _ASM_CD_MEMORY_C
  277. static
  278. #endif
  279. void s68k_reg_write8(u32 a, u32 d)
  280. {
  281. // Warning: d might have upper bits set
  282. switch (a) {
  283. case 2:
  284. return; // only m68k can change WP
  285. case 3: {
  286. int dold = Pico_mcd->s68k_regs[3];
  287. elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
  288. d &= 0x1d;
  289. d |= dold & 0xc2;
  290. if (d & 4)
  291. {
  292. if ((d ^ dold) & 0x1d) {
  293. d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
  294. remap_word_ram(d);
  295. }
  296. if (!(dold & 4)) {
  297. elprintf(EL_CDREG3, "wram mode 2M->1M");
  298. wram_2M_to_1M(Pico_mcd->word_ram2M);
  299. }
  300. }
  301. else
  302. {
  303. if (dold & 4) {
  304. elprintf(EL_CDREG3, "wram mode 1M->2M");
  305. if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
  306. d &= ~3;
  307. d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
  308. }
  309. wram_1M_to_2M(Pico_mcd->word_ram2M);
  310. remap_word_ram(d);
  311. }
  312. // s68k can only set RET, writing 0 has no effect
  313. else if ((dold ^ d) & d & 1) { // RET being set
  314. SekEndRunS68k(20+16+10+12+16); // see DMNA case
  315. } else
  316. d |= dold & 1;
  317. if (d & 1)
  318. d &= ~2; // DMNA clears
  319. }
  320. break;
  321. }
  322. case 4:
  323. elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
  324. Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
  325. return;
  326. case 5:
  327. //dprintf("s68k CDC reg addr: %x", d&0xf);
  328. break;
  329. case 7:
  330. CDC_Write_Reg(d);
  331. return;
  332. case 0xa:
  333. elprintf(EL_CDREGS, "s68k set CDC dma addr");
  334. break;
  335. case 0xc:
  336. case 0xd:
  337. elprintf(EL_CDREGS, "s68k set stopwatch timer");
  338. Pico_mcd->m.timer_stopwatch = 0;
  339. return;
  340. case 0xe:
  341. Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
  342. return;
  343. case 0x31:
  344. elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);
  345. Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
  346. break;
  347. case 0x33: // IRQ mask
  348. elprintf(EL_CDREGS, "s68k irq mask: %02x", d);
  349. if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
  350. CDD_Export_Status();
  351. }
  352. break;
  353. case 0x34: // fader
  354. Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
  355. return;
  356. case 0x36:
  357. return; // d/m bit is unsetable
  358. case 0x37: {
  359. u32 d_old = Pico_mcd->s68k_regs[0x37];
  360. Pico_mcd->s68k_regs[0x37] = d&7;
  361. if ((d&4) && !(d_old&4)) {
  362. CDD_Export_Status();
  363. }
  364. return;
  365. }
  366. case 0x4b:
  367. Pico_mcd->s68k_regs[a] = (u8) d;
  368. CDD_Import_Command();
  369. return;
  370. }
  371. if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
  372. {
  373. elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
  374. return;
  375. }
  376. Pico_mcd->s68k_regs[a] = (u8) d;
  377. }
  378. // -----------------------------------------------------------------
  379. // Main 68k
  380. // -----------------------------------------------------------------
  381. #ifndef _ASM_CD_MEMORY_C
  382. #include "cell_map.c"
  383. // WORD RAM, cell aranged area (220000 - 23ffff)
  384. static u32 PicoReadM68k8_cell0(u32 a)
  385. {
  386. a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
  387. return Pico_mcd->word_ram1M[0][a ^ 1];
  388. }
  389. static u32 PicoReadM68k8_cell1(u32 a)
  390. {
  391. a = (a&3) | (cell_map(a >> 2) << 2);
  392. return Pico_mcd->word_ram1M[1][a ^ 1];
  393. }
  394. static u32 PicoReadM68k16_cell0(u32 a)
  395. {
  396. a = (a&2) | (cell_map(a >> 2) << 2);
  397. return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
  398. }
  399. static u32 PicoReadM68k16_cell1(u32 a)
  400. {
  401. a = (a&2) | (cell_map(a >> 2) << 2);
  402. return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
  403. }
  404. static void PicoWriteM68k8_cell0(u32 a, u32 d)
  405. {
  406. a = (a&3) | (cell_map(a >> 2) << 2);
  407. Pico_mcd->word_ram1M[0][a ^ 1] = d;
  408. }
  409. static void PicoWriteM68k8_cell1(u32 a, u32 d)
  410. {
  411. a = (a&3) | (cell_map(a >> 2) << 2);
  412. Pico_mcd->word_ram1M[1][a ^ 1] = d;
  413. }
  414. static void PicoWriteM68k16_cell0(u32 a, u32 d)
  415. {
  416. a = (a&3) | (cell_map(a >> 2) << 2);
  417. *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
  418. }
  419. static void PicoWriteM68k16_cell1(u32 a, u32 d)
  420. {
  421. a = (a&3) | (cell_map(a >> 2) << 2);
  422. *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
  423. }
  424. #endif
  425. // RAM cart (40000 - 7fffff, optional)
  426. static u32 PicoReadM68k8_ramc(u32 a)
  427. {
  428. u32 d = 0;
  429. if (a == 0x400001) {
  430. if (SRam.data != NULL)
  431. d = 3; // 64k cart
  432. return d;
  433. }
  434. if ((a & 0xfe0000) == 0x600000) {
  435. if (SRam.data != NULL)
  436. d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
  437. return d;
  438. }
  439. if (a == 0x7fffff)
  440. return Pico_mcd->m.bcram_reg;
  441. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  442. return d;
  443. }
  444. static u32 PicoReadM68k16_ramc(u32 a)
  445. {
  446. elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
  447. return PicoReadM68k8_ramc(a + 1);
  448. }
  449. static void PicoWriteM68k8_ramc(u32 a, u32 d)
  450. {
  451. if ((a & 0xfe0000) == 0x600000) {
  452. if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
  453. SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
  454. SRam.changed = 1;
  455. }
  456. return;
  457. }
  458. if (a == 0x7fffff) {
  459. Pico_mcd->m.bcram_reg = d;
  460. return;
  461. }
  462. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  463. }
  464. static void PicoWriteM68k16_ramc(u32 a, u32 d)
  465. {
  466. elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  467. PicoWriteM68k8_ramc(a + 1, d);
  468. }
  469. // IO/control/cd registers (a10000 - ...)
  470. #ifndef _ASM_CD_MEMORY_C
  471. static u32 PicoReadM68k8_io(u32 a)
  472. {
  473. u32 d;
  474. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  475. d = m68k_reg_read16(a); // TODO: m68k_reg_read8
  476. if (!(a & 1))
  477. d >>= 8;
  478. d &= 0xff;
  479. elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);
  480. return d;
  481. }
  482. // fallback to default MD handler
  483. return PicoRead8_io(a);
  484. }
  485. static u32 PicoReadM68k16_io(u32 a)
  486. {
  487. u32 d;
  488. if ((a & 0xff00) == 0x2000) {
  489. d = m68k_reg_read16(a);
  490. elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);
  491. return d;
  492. }
  493. return PicoRead16_io(a);
  494. }
  495. static void PicoWriteM68k8_io(u32 a, u32 d)
  496. {
  497. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  498. elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
  499. m68k_reg_write8(a, d);
  500. return;
  501. }
  502. PicoWrite16_io(a, d);
  503. }
  504. static void PicoWriteM68k16_io(u32 a, u32 d)
  505. {
  506. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  507. elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
  508. /* TODO FIXME?
  509. if (a == 0xe) { // special case, 2 byte writes would be handled differently
  510. Pico_mcd->s68k_regs[0xe] = d >> 8;
  511. #ifdef USE_POLL_DETECT
  512. if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
  513. SekSetStopS68k(0); s68k_poll_adclk = 0;
  514. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  515. }
  516. #endif
  517. return;
  518. }
  519. */
  520. m68k_reg_write8(a, d >> 8);
  521. m68k_reg_write8(a + 1, d & 0xff);
  522. return;
  523. }
  524. PicoWrite16_io(a, d);
  525. }
  526. #endif
  527. // -----------------------------------------------------------------
  528. // Sub 68k
  529. // -----------------------------------------------------------------
  530. static u32 s68k_unmapped_read8(u32 a)
  531. {
  532. elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
  533. return 0;
  534. }
  535. static u32 s68k_unmapped_read16(u32 a)
  536. {
  537. elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
  538. return 0;
  539. }
  540. static void s68k_unmapped_write8(u32 a, u32 d)
  541. {
  542. elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  543. }
  544. static void s68k_unmapped_write16(u32 a, u32 d)
  545. {
  546. elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  547. }
  548. // PRG RAM protected range (000000 - 00ff00)?
  549. // XXX verify: ff00 or 1fe00 max?
  550. static void PicoWriteS68k8_prgwp(u32 a, u32 d)
  551. {
  552. if (a >= (Pico_mcd->s68k_regs[2] << 8))
  553. Pico_mcd->prg_ram[a ^ 1] = d;
  554. }
  555. static void PicoWriteS68k16_prgwp(u32 a, u32 d)
  556. {
  557. if (a >= (Pico_mcd->s68k_regs[2] << 8))
  558. *(u16 *)(Pico_mcd->prg_ram + a) = d;
  559. }
  560. #ifndef _ASM_CD_MEMORY_C
  561. // decode (080000 - 0bffff, in 1M mode)
  562. static u32 PicoReadS68k8_dec0(u32 a)
  563. {
  564. u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
  565. if (a & 1)
  566. d &= 0x0f;
  567. else
  568. d >>= 4;
  569. return d;
  570. }
  571. static u32 PicoReadS68k8_dec1(u32 a)
  572. {
  573. u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
  574. if (a & 1)
  575. d &= 0x0f;
  576. else
  577. d >>= 4;
  578. return d;
  579. }
  580. static u32 PicoReadS68k16_dec0(u32 a)
  581. {
  582. u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
  583. d |= d << 4;
  584. d &= ~0xf0;
  585. return d;
  586. }
  587. static u32 PicoReadS68k16_dec1(u32 a)
  588. {
  589. u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
  590. d |= d << 4;
  591. d &= ~0xf0;
  592. return d;
  593. }
  594. /* check: jaguar xj 220 (draws entire world using decode) */
  595. #define mk_decode_w8(bank) \
  596. static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
  597. { \
  598. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  599. \
  600. if (!(a & 1)) \
  601. *pd = (*pd & 0x0f) | (d << 4); \
  602. else \
  603. *pd = (*pd & 0xf0) | (d & 0x0f); \
  604. } \
  605. \
  606. static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
  607. { \
  608. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  609. u8 mask = (a & 1) ? 0x0f : 0xf0; \
  610. \
  611. if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
  612. PicoWriteS68k8_dec_m0b##bank(a, d); \
  613. } \
  614. \
  615. static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
  616. { \
  617. if (d & 0x0f) /* overwrite */ \
  618. PicoWriteS68k8_dec_m0b##bank(a, d); \
  619. }
  620. mk_decode_w8(0)
  621. mk_decode_w8(1)
  622. #define mk_decode_w16(bank) \
  623. static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
  624. { \
  625. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  626. \
  627. d &= 0x0f0f; \
  628. *pd = d | (d >> 4); \
  629. } \
  630. \
  631. static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
  632. { \
  633. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  634. \
  635. d &= 0x0f0f; /* underwrite */ \
  636. if (!(*pd & 0xf0)) *pd |= d >> 4; \
  637. if (!(*pd & 0x0f)) *pd |= d; \
  638. } \
  639. \
  640. static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
  641. { \
  642. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  643. \
  644. d &= 0x0f0f; /* overwrite */ \
  645. d |= d >> 4; \
  646. \
  647. if (!(d & 0xf0)) d |= *pd & 0xf0; \
  648. if (!(d & 0x0f)) d |= *pd & 0x0f; \
  649. *pd = d; \
  650. }
  651. mk_decode_w16(0)
  652. mk_decode_w16(1)
  653. #endif
  654. // backup RAM (fe0000 - feffff)
  655. static u32 PicoReadS68k8_bram(u32 a)
  656. {
  657. return Pico_mcd->bram[(a>>1)&0x1fff];
  658. }
  659. static u32 PicoReadS68k16_bram(u32 a)
  660. {
  661. u32 d;
  662. elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
  663. a = (a >> 1) & 0x1fff;
  664. d = Pico_mcd->bram[a++];
  665. d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
  666. return d;
  667. }
  668. static void PicoWriteS68k8_bram(u32 a, u32 d)
  669. {
  670. Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
  671. SRam.changed = 1;
  672. }
  673. static void PicoWriteS68k16_bram(u32 a, u32 d)
  674. {
  675. elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  676. a = (a >> 1) & 0x1fff;
  677. Pico_mcd->bram[a++] = d;
  678. Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
  679. SRam.changed = 1;
  680. }
  681. #ifndef _ASM_CD_MEMORY_C
  682. // PCM and registers (ff0000 - ffffff)
  683. static u32 PicoReadS68k8_pr(u32 a)
  684. {
  685. u32 d = 0;
  686. // regs
  687. if ((a & 0xfe00) == 0x8000) {
  688. a &= 0x1ff;
  689. elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
  690. if (a >= 0x0e && a < 0x30) {
  691. d = Pico_mcd->s68k_regs[a];
  692. s68k_poll_detect(a, d);
  693. elprintf(EL_CDREGS, "ret = %02x", (u8)d);
  694. return d;
  695. }
  696. else if (a >= 0x58 && a < 0x68)
  697. d = gfx_cd_read(a & ~1);
  698. else d = s68k_reg_read16(a & ~1);
  699. if (!(a & 1))
  700. d >>= 8;
  701. elprintf(EL_CDREGS, "ret = %02x", (u8)d);
  702. return d & 0xff;
  703. }
  704. // PCM
  705. // XXX: verify: probably odd addrs only?
  706. if ((a & 0x8000) == 0x0000) {
  707. a &= 0x7fff;
  708. if (a >= 0x2000)
  709. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  710. else if (a >= 0x20) {
  711. a &= 0x1e;
  712. d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
  713. if (a & 2)
  714. d >>= 8;
  715. }
  716. return d & 0xff;
  717. }
  718. return s68k_unmapped_read8(a);
  719. }
  720. static u32 PicoReadS68k16_pr(u32 a)
  721. {
  722. u32 d = 0;
  723. // regs
  724. if ((a & 0xfe00) == 0x8000) {
  725. a &= 0x1fe;
  726. elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
  727. if (0x58 <= a && a < 0x68)
  728. d = gfx_cd_read(a);
  729. else d = s68k_reg_read16(a);
  730. elprintf(EL_CDREGS, "ret = %04x", d);
  731. return d;
  732. }
  733. // PCM
  734. if ((a & 0x8000) == 0x0000) {
  735. //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
  736. a &= 0x7fff;
  737. if (a >= 0x2000)
  738. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
  739. else if (a >= 0x20) {
  740. a &= 0x1e;
  741. d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
  742. if (a & 2) d >>= 8;
  743. }
  744. elprintf(EL_CDREGS, "ret = %04x", d);
  745. return d;
  746. }
  747. return s68k_unmapped_read16(a);
  748. }
  749. static void PicoWriteS68k8_pr(u32 a, u32 d)
  750. {
  751. // regs
  752. if ((a & 0xfe00) == 0x8000) {
  753. a &= 0x1ff;
  754. elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
  755. if (0x58 <= a && a < 0x68)
  756. gfx_cd_write16(a&~1, (d<<8)|d);
  757. else s68k_reg_write8(a,d);
  758. return;
  759. }
  760. // PCM
  761. if ((a & 0x8000) == 0x0000) {
  762. a &= 0x7fff;
  763. if (a >= 0x2000)
  764. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  765. else if (a < 0x12)
  766. pcm_write(a>>1, d);
  767. return;
  768. }
  769. s68k_unmapped_write8(a, d);
  770. }
  771. static void PicoWriteS68k16_pr(u32 a, u32 d)
  772. {
  773. // regs
  774. if ((a & 0xfe00) == 0x8000) {
  775. a &= 0x1fe;
  776. elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
  777. if (a >= 0x58 && a < 0x68)
  778. gfx_cd_write16(a, d);
  779. else {
  780. if (a == 0xe) {
  781. // special case, 2 byte writes would be handled differently
  782. // TODO: verify
  783. Pico_mcd->s68k_regs[0xf] = d;
  784. return;
  785. }
  786. s68k_reg_write8(a, d >> 8);
  787. s68k_reg_write8(a + 1, d & 0xff);
  788. }
  789. return;
  790. }
  791. // PCM
  792. if ((a & 0x8000) == 0x0000) {
  793. a &= 0x7fff;
  794. if (a >= 0x2000)
  795. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  796. else if (a < 0x12)
  797. pcm_write(a>>1, d & 0xff);
  798. return;
  799. }
  800. s68k_unmapped_write16(a, d);
  801. }
  802. #endif
  803. static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
  804. static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
  805. static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
  806. static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
  807. static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
  808. static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
  809. static const void *s68k_dec_write8[2][4] = {
  810. { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
  811. { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
  812. };
  813. static const void *s68k_dec_write16[2][4] = {
  814. { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
  815. { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
  816. };
  817. // -----------------------------------------------------------------
  818. static void remap_prg_window(void)
  819. {
  820. // PRG RAM
  821. if (Pico_mcd->m.busreq & 2) {
  822. void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];
  823. cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
  824. }
  825. else {
  826. m68k_map_unmap(0x020000, 0x03ffff);
  827. }
  828. }
  829. static void remap_word_ram(int r3)
  830. {
  831. void *bank;
  832. // WORD RAM
  833. if (!(r3 & 4)) {
  834. // 2M mode. XXX: allowing access in all cases for simplicity
  835. bank = Pico_mcd->word_ram2M;
  836. cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
  837. cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
  838. // TODO: handle 0x0c0000
  839. }
  840. else {
  841. int b0 = r3 & 1;
  842. int m = (r3 & 0x18) >> 3;
  843. bank = Pico_mcd->word_ram1M[b0];
  844. cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
  845. bank = Pico_mcd->word_ram1M[b0 ^ 1];
  846. cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
  847. // "cell arrange" on m68k
  848. cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
  849. cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
  850. cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
  851. cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
  852. // "decode format" on s68k
  853. cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
  854. cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
  855. cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
  856. cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
  857. }
  858. #ifdef EMU_F68K
  859. // update fetchmap..
  860. int i;
  861. if (!(r3 & 4))
  862. {
  863. for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
  864. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
  865. }
  866. else
  867. {
  868. for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
  869. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
  870. for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
  871. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
  872. }
  873. #endif
  874. }
  875. void PicoMemStateLoaded(void)
  876. {
  877. int r3 = Pico_mcd->s68k_regs[3];
  878. /* after load events */
  879. if (r3 & 4) // 1M mode?
  880. wram_2M_to_1M(Pico_mcd->word_ram2M);
  881. remap_word_ram(r3);
  882. remap_prg_window();
  883. // restore hint vector
  884. *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
  885. }
  886. #ifdef EMU_M68K
  887. static void m68k_mem_setup_cd(void);
  888. #endif
  889. PICO_INTERNAL void PicoMemSetupCD(void)
  890. {
  891. // setup default main68k map
  892. PicoMemSetup();
  893. // main68k map (BIOS mapped by PicoMemSetup()):
  894. // RAM cart
  895. if (PicoOpt & POPT_EN_MCD_RAMCART) {
  896. cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
  897. cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
  898. cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
  899. cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
  900. }
  901. // registers/IO:
  902. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);
  903. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);
  904. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);
  905. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);
  906. // sub68k map
  907. cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
  908. cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
  909. cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
  910. cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
  911. // PRG RAM
  912. cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  913. cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  914. cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  915. cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  916. cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);
  917. cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);
  918. // BRAM
  919. cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
  920. cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
  921. cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
  922. cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
  923. // PCM, regs
  924. cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
  925. cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
  926. cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
  927. cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
  928. // RAMs
  929. remap_word_ram(1);
  930. #ifdef EMU_C68K
  931. // s68k
  932. PicoCpuCS68k.read8 = (void *)s68k_read8_map;
  933. PicoCpuCS68k.read16 = (void *)s68k_read16_map;
  934. PicoCpuCS68k.read32 = (void *)s68k_read16_map;
  935. PicoCpuCS68k.write8 = (void *)s68k_write8_map;
  936. PicoCpuCS68k.write16 = (void *)s68k_write16_map;
  937. PicoCpuCS68k.write32 = (void *)s68k_write16_map;
  938. PicoCpuCS68k.checkpc = NULL; /* unused */
  939. PicoCpuCS68k.fetch8 = NULL;
  940. PicoCpuCS68k.fetch16 = NULL;
  941. PicoCpuCS68k.fetch32 = NULL;
  942. #endif
  943. #ifdef EMU_F68K
  944. // s68k
  945. PicoCpuFS68k.read_byte = s68k_read8;
  946. PicoCpuFS68k.read_word = s68k_read16;
  947. PicoCpuFS68k.read_long = s68k_read32;
  948. PicoCpuFS68k.write_byte = s68k_write8;
  949. PicoCpuFS68k.write_word = s68k_write16;
  950. PicoCpuFS68k.write_long = s68k_write32;
  951. // setup FAME fetchmap
  952. {
  953. int i;
  954. // M68k
  955. // by default, point everything to fitst 64k of ROM (BIOS)
  956. for (i = 0; i < M68K_FETCHBANK1; i++)
  957. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  958. // now real ROM (BIOS)
  959. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  960. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
  961. // .. and RAM
  962. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  963. PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
  964. // S68k
  965. // PRG RAM is default
  966. for (i = 0; i < M68K_FETCHBANK1; i++)
  967. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
  968. // real PRG RAM
  969. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
  970. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
  971. // WORD RAM 2M area
  972. for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
  973. PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
  974. // remap_word_ram() will setup word ram for both
  975. }
  976. #endif
  977. #ifdef EMU_M68K
  978. m68k_mem_setup_cd();
  979. #endif
  980. // m68k_poll_addr = m68k_poll_cnt = 0;
  981. s68k_poll_adclk = s68k_poll_cnt = 0;
  982. }
  983. #ifdef EMU_M68K
  984. u32 m68k_read8(u32 a);
  985. u32 m68k_read16(u32 a);
  986. u32 m68k_read32(u32 a);
  987. void m68k_write8(u32 a, u8 d);
  988. void m68k_write16(u32 a, u16 d);
  989. void m68k_write32(u32 a, u32 d);
  990. static unsigned int PicoReadCD8w (unsigned int a) {
  991. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
  992. }
  993. static unsigned int PicoReadCD16w(unsigned int a) {
  994. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
  995. }
  996. static unsigned int PicoReadCD32w(unsigned int a) {
  997. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
  998. }
  999. static void PicoWriteCD8w (unsigned int a, unsigned char d) {
  1000. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
  1001. }
  1002. static void PicoWriteCD16w(unsigned int a, unsigned short d) {
  1003. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
  1004. }
  1005. static void PicoWriteCD32w(unsigned int a, unsigned int d) {
  1006. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
  1007. }
  1008. extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
  1009. extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
  1010. extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
  1011. extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
  1012. extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
  1013. extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
  1014. static void m68k_mem_setup_cd(void)
  1015. {
  1016. pm68k_read_memory_8 = PicoReadCD8w;
  1017. pm68k_read_memory_16 = PicoReadCD16w;
  1018. pm68k_read_memory_32 = PicoReadCD32w;
  1019. pm68k_write_memory_8 = PicoWriteCD8w;
  1020. pm68k_write_memory_16 = PicoWriteCD16w;
  1021. pm68k_write_memory_32 = PicoWriteCD32w;
  1022. }
  1023. #endif // EMU_M68K