32x.c 7.5 KB

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  1. /*
  2. * PicoDrive
  3. * (C) notaz, 2009,2010
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../sound/ym2612.h"
  10. struct Pico32x Pico32x;
  11. SH2 sh2s[2];
  12. static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
  13. {
  14. if (sh2->pending_irl > sh2->pending_int_irq) {
  15. elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
  16. sh2->is_slave ? 's' : 'm', level, sh2->pc);
  17. return 64 + sh2->pending_irl / 2;
  18. } else {
  19. elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
  20. sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
  21. sh2->pending_int_irq = 0; // auto-clear
  22. sh2->pending_level = sh2->pending_irl;
  23. return sh2->pending_int_vector;
  24. }
  25. }
  26. void p32x_update_irls(int nested_call)
  27. {
  28. int irqs, mlvl = 0, slvl = 0;
  29. // msh2
  30. irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
  31. while ((irqs >>= 1))
  32. mlvl++;
  33. mlvl *= 2;
  34. // ssh2
  35. irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
  36. while ((irqs >>= 1))
  37. slvl++;
  38. slvl *= 2;
  39. elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
  40. sh2_irl_irq(&msh2, mlvl, nested_call);
  41. sh2_irl_irq(&ssh2, slvl, nested_call);
  42. mlvl = mlvl ? 1 : 0;
  43. slvl = slvl ? 1 : 0;
  44. p32x_poll_event(mlvl | (slvl << 1), 0);
  45. }
  46. void Pico32xStartup(void)
  47. {
  48. elprintf(EL_STATUS|EL_32X, "32X startup");
  49. // TODO: OOM handling
  50. PicoAHW |= PAHW_32X;
  51. sh2_init(&msh2, 0);
  52. msh2.irq_callback = sh2_irq_cb;
  53. sh2_init(&ssh2, 1);
  54. ssh2.irq_callback = sh2_irq_cb;
  55. PicoMemSetup32x();
  56. if (!Pico.m.pal)
  57. Pico32x.vdp_regs[0] |= P32XV_nPAL;
  58. PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
  59. PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
  60. emu_32x_startup();
  61. }
  62. #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
  63. void p32x_reset_sh2s(void)
  64. {
  65. elprintf(EL_32X, "sh2 reset");
  66. sh2_reset(&msh2);
  67. sh2_reset(&ssh2);
  68. // if we don't have BIOS set, perform it's work here.
  69. // MSH2
  70. if (p32x_bios_m == NULL) {
  71. unsigned int idl_src, idl_dst, idl_size; // initial data load
  72. unsigned int vbr;
  73. // initial data
  74. idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
  75. idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
  76. idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
  77. if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
  78. idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
  79. elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
  80. idl_src, idl_dst, idl_size);
  81. }
  82. else
  83. memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
  84. // GBR/VBR
  85. vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
  86. sh2_set_gbr(0, 0x20004000);
  87. sh2_set_vbr(0, vbr);
  88. // checksum and M_OK
  89. Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
  90. // program will set M_OK
  91. }
  92. // SSH2
  93. if (p32x_bios_s == NULL) {
  94. unsigned int vbr;
  95. // GBR/VBR
  96. vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
  97. sh2_set_gbr(1, 0x20004000);
  98. sh2_set_vbr(1, vbr);
  99. // program will set S_OK
  100. }
  101. }
  102. void Pico32xInit(void)
  103. {
  104. }
  105. void PicoPower32x(void)
  106. {
  107. memset(&Pico32x, 0, sizeof(Pico32x));
  108. Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
  109. Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
  110. Pico32x.sh2_regs[0] = P32XS2_ADEN;
  111. }
  112. void PicoUnload32x(void)
  113. {
  114. if (Pico32xMem != NULL)
  115. plat_munmap(Pico32xMem, sizeof(*Pico32xMem));
  116. Pico32xMem = NULL;
  117. sh2_finish(&msh2);
  118. sh2_finish(&ssh2);
  119. PicoAHW &= ~PAHW_32X;
  120. }
  121. void PicoReset32x(void)
  122. {
  123. if (PicoAHW & PAHW_32X) {
  124. Pico32x.sh2irqs |= P32XI_VRES;
  125. p32x_update_irls(0);
  126. p32x_poll_event(3, 0);
  127. }
  128. }
  129. static void p32x_start_blank(void)
  130. {
  131. if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
  132. int offs, lines;
  133. pprof_start(draw);
  134. offs = 8; lines = 224;
  135. if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
  136. offs = 0;
  137. lines = 240;
  138. }
  139. // XXX: no proper handling of 32col mode..
  140. if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
  141. (Pico.video.reg[12] & 1) && // 40col mode
  142. (PicoDrawMask & PDRAW_32X_ON))
  143. {
  144. int md_bg = Pico.video.reg[7] & 0x3f;
  145. // we draw full layer (not line-by-line)
  146. PicoDraw32xLayer(offs, lines, md_bg);
  147. }
  148. else if (Pico32xDrawMode != PDM32X_32X_ONLY)
  149. PicoDraw32xLayerMdOnly(offs, lines);
  150. pprof_end(draw);
  151. }
  152. // enter vblank
  153. Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
  154. // FB swap waits until vblank
  155. if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
  156. Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
  157. Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
  158. Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
  159. }
  160. Pico32x.sh2irqs |= P32XI_VINT;
  161. p32x_update_irls(0);
  162. p32x_poll_event(3, 1);
  163. }
  164. static __inline void run_m68k(int cyc)
  165. {
  166. pprof_start(m68k);
  167. p32x_poll_event(3, 0);
  168. #if defined(EMU_C68K)
  169. PicoCpuCM68k.cycles = cyc;
  170. CycloneRun(&PicoCpuCM68k);
  171. SekCycleCnt += cyc - PicoCpuCM68k.cycles;
  172. #elif defined(EMU_M68K)
  173. SekCycleCnt += m68k_execute(cyc);
  174. #elif defined(EMU_F68K)
  175. SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
  176. #endif
  177. pprof_end(m68k);
  178. }
  179. // ~1463.8, but due to cache misses and slow mem
  180. // it's much lower than that
  181. //#define SH2_LINE_CYCLES 735
  182. #define CYCLES_M68K2MSH2(x) (((x) * p32x_msh2_multiplier) >> 10)
  183. #define CYCLES_M68K2SSH2(x) (((x) * p32x_ssh2_multiplier) >> 10)
  184. #define PICO_32X
  185. #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
  186. { \
  187. int slice; \
  188. SekCycleAim += m68k_cycles; \
  189. while (SekCycleCnt < SekCycleAim) { \
  190. slice = SekCycleCnt; \
  191. run_m68k(SekCycleAim - SekCycleCnt); \
  192. if (!(Pico32x.regs[0] & P32XS_nRES)) \
  193. continue; /* SH2s reseting */ \
  194. slice = SekCycleCnt - slice; /* real count from 68k */ \
  195. if (SekCycleCnt < SekCycleAim) \
  196. elprintf(EL_32X, "slice %d", slice); \
  197. if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) { \
  198. pprof_start(ssh2); \
  199. sh2_execute(&ssh2, CYCLES_M68K2SSH2(slice)); \
  200. pprof_end(ssh2); \
  201. } \
  202. if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) { \
  203. pprof_start(msh2); \
  204. sh2_execute(&msh2, CYCLES_M68K2MSH2(slice)); \
  205. pprof_end(msh2); \
  206. } \
  207. pprof_start(dummy); \
  208. pprof_end(dummy); \
  209. } \
  210. }
  211. #define STEP_68K 24
  212. #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
  213. { \
  214. int i; \
  215. for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
  216. run_m68k(STEP_68K); \
  217. if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
  218. sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
  219. if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
  220. sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
  221. } \
  222. /* last step */ \
  223. i = (m68k_cycles) - i; \
  224. run_m68k(i); \
  225. if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
  226. sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
  227. if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
  228. sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
  229. }
  230. #define CPUS_RUN CPUS_RUN_SIMPLE
  231. //#define CPUS_RUN CPUS_RUN_LOCKSTEP
  232. #include "../pico_cmn.c"
  233. void PicoFrame32x(void)
  234. {
  235. pwm_frame_smp_cnt = 0;
  236. Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
  237. if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
  238. Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
  239. p32x_poll_event(3, 1);
  240. PicoFrameStart();
  241. PicoFrameHints();
  242. elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
  243. }